Searched refs:ALCHEMY_GPIO1_BASE (Results 1 – 2 of 2) sorted by relevance
17 #define ALCHEMY_GPIO1_BASE 0 macro47 return MAKE_IRQ(1, gpio - ALCHEMY_GPIO1_BASE); in au1000_gpio1_to_irq()58 return ALCHEMY_GPIO1_BASE + (irq - AU1000_GPIO0_INT) + 0; in au1000_irq_to_gpio()65 gpio -= ALCHEMY_GPIO1_BASE; in au1500_gpio1_to_irq()95 return ALCHEMY_GPIO1_BASE + (irq - AU1500_GPIO0_INT) + 0; in au1500_irq_to_gpio()111 return MAKE_IRQ(1, gpio - ALCHEMY_GPIO1_BASE); in au1100_gpio1_to_irq()138 gpio -= ALCHEMY_GPIO1_BASE; in au1550_gpio1_to_irq()182 return MAKE_IRQ(1, gpio - ALCHEMY_GPIO1_BASE); in au1200_gpio1_to_irq()220 unsigned long mask = 1 << (gpio - ALCHEMY_GPIO1_BASE); in alchemy_gpio1_set_value()227 unsigned long mask = 1 << (gpio - ALCHEMY_GPIO1_BASE); in alchemy_gpio1_get_value()[all …]
68 return !!alchemy_gpio1_get_value(offset + ALCHEMY_GPIO1_BASE); in gpio1_get()74 alchemy_gpio1_set_value(offset + ALCHEMY_GPIO1_BASE, value); in gpio1_set()79 return alchemy_gpio1_direction_input(offset + ALCHEMY_GPIO1_BASE); in gpio1_direction_input()85 return alchemy_gpio1_direction_output(offset + ALCHEMY_GPIO1_BASE, in gpio1_direction_output()91 return alchemy_gpio1_to_irq(offset + ALCHEMY_GPIO1_BASE); in gpio1_to_irq()102 .base = ALCHEMY_GPIO1_BASE,