Home
last modified time | relevance | path

Searched refs:ACC (Results 1 – 21 of 21) sorted by relevance

/openbmc/qemu/target/hexagon/imported/
H A Dshift.idef30 #define RSHIFTTYPES(TAGEND,REGD,REGS,REGSTYPE,ACC,ACCSRC,SAT,SATOPT,ATTRS) \
31 Q6INSN(S2_asr_r_##TAGEND,#REGD "32" #ACC "=asr(" #REGS "32,Rt32)" #SATOPT,ATTRIBS(ATTRS), \
35 REGD##V = SAT(ACCSRC ACC fBIDIR_ASHIFTR(REGS##V,shamt,REGSTYPE)); \
38 Q6INSN(S2_asl_r_##TAGEND,#REGD "32" #ACC "=asl(" #REGS "32,Rt32)" #SATOPT,ATTRIBS(ATTRS), \
42 REGD##V = SAT(ACCSRC ACC fBIDIR_ASHIFTL(REGS##V,shamt,REGSTYPE)); \
45 Q6INSN(S2_lsr_r_##TAGEND,#REGD "32" #ACC "=lsr(" #REGS "32,Rt32)" #SATOPT,ATTRIBS(ATTRS), \
49 REGD##V = SAT(ACCSRC ACC fBIDIR_LSHIFTR(REGS##V,shamt,REGSTYPE)); \
52 Q6INSN(S2_lsl_r_##TAGEND,#REGD "32" #ACC "=lsl(" #REGS "32,Rt32)" #SATOPT,ATTRIBS(ATTRS), \
56 REGD##V = SAT(ACCSRC ACC fBIDIR_LSHIFTL(REGS##V,shamt,REGSTYPE)); \
97 #define ISHIFTTYPES(TAGEND,SIZE,REGD,REGS,REGSTYPE,ACC,ACCSRC,SAT,SATOPT,ATTRS) \
[all …]
H A Dmacros.def1246 internal_mpyhh(A,B,ACC),
/openbmc/linux/drivers/vfio/pci/hisilicon/
H A DKconfig3 tristate "VFIO support for HiSilicon ACC PCI devices"
12 This provides generic PCI support for HiSilicon ACC devices
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dalphascale,acc.txt3 The ACC (Alphascale Clock Controller) is responsible for choosing proper
6 Required properties for the ACC node:
8 - reg: must contain the ACC register base and size
/openbmc/openbmc/poky/meta/recipes-support/lzop/lzop/
H A Dacinclude.m442 AC_MSG_CHECKING([whether your compiler passes the ACC conformance test])
82 AC_MSG_NOTICE([Your compiler failed the ACC conformance test - for details see ])
87 AC_MSG_ERROR([ACC conformance test failed. Stop.])
104 AC_MSG_CHECKING([whether your compiler passes the ACC conformance test])
149 AC_MSG_NOTICE([Your compiler failed the ACC conformance test - for details see ])
154 AC_MSG_ERROR([ACC conformance test failed. Stop.])
324 dnl more types which are not yet covered by ACC
/openbmc/linux/Documentation/filesystems/caching/
H A Dfscache.rst262 VOLUME REF nCOOK ACC FL CACHE KEY
274 ACC Number of accesses pinning the cache
291 COOKIE VOLUME REF ACT ACC S FL DEF
311 ACC Number of access pins in the cookie
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-bosch-acc.dts3 * Support for the i.MX6-based Bosch ACC board.
19 model = "Bosch ACC";
/openbmc/qemu/target/arm/tcg/
H A Dtranslate-neon.c1833 #define DO_VMLAL(INSN,MULL,ACC) \ argument
1843 gen_helper_neon_##ACC##l_u16, \
1844 gen_helper_neon_##ACC##l_u32, \
1845 tcg_gen_##ACC##_i64, \
2363 #define DO_VMLAL_2SC(INSN, MULL, ACC) \ argument
2374 gen_helper_neon_##ACC##l_u32, \
2375 tcg_gen_##ACC##_i64, \
/openbmc/linux/Documentation/admin-guide/media/
H A Dipu3.rst556 ACC
579 called accelerator cluster (ACC) to crunch pixel data and produce statistics.
581 ACC parameters of individual algorithms, as defined by
/openbmc/linux/Documentation/crypto/
H A Dasymmetric-keys.rst68 1A00 2040 7601 7889 DE11 882C 3823 04AD 5ACC 2142
/openbmc/linux/Documentation/scsi/
H A Dscsi_fc_transport.rst297 | Initializing: | FDISC ACC | Active |
H A DChangeLog.lpfc768 sent. Thus we cannot ABTS the ADISC before sending the LOGO ACC.
/openbmc/qemu/target/ppc/translate/
H A Dvsx-impl.c.inc2768 * ACC[i] and VSRs 4*i to 4*i + 3 logically containing the same data"
2771 * so ACC[i] is the same as VSRs 4*i to 4*i+3 and therefore
/openbmc/linux/drivers/clk/qcom/
H A DKconfig1075 Support for the Krait ACC and GCC clock controllers. Say Y
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dxtensa-modules.c.inc161 { "ACC", 40, 0 },
/openbmc/qemu/target/xtensa/core-de212/
H A Dxtensa-modules.c.inc150 { "ACC", 40, 0 },
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dxtensa-modules.c.inc157 { "ACC", 40, 0 },
/openbmc/openbmc/poky/meta/lib/oeqa/files/
H A Dbuildhistory_filelist2.txt363 lrwxrwxrwx root root 10 ./etc/ssl/certs/349f2832.0 -> EC-ACC.pem
495 … root 53 ./etc/ssl/certs/EC-ACC.pem -> ../../../usr/share/ca-certificates/mozill…
8125 -rw-r--r-- root root 1911 ./usr/share/ca-certificates/mozilla/EC-ACC.crt
H A Dbuildhistory_filelist1.txt363 lrwxrwxrwx root root 10 ./etc/ssl/certs/349f2832.0 -> EC-ACC.pem
495 … root 53 ./etc/ssl/certs/EC-ACC.pem -> ../../../usr/share/ca-certificates/mozill…
8122 -rw-r--r-- root root 1911 ./usr/share/ca-certificates/mozilla/EC-ACC.crt
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dxtensa-modules.c.inc161 { "ACC", 40, 0 },
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dxtensa-modules.c.inc165 { "ACC", 40, 0 },