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Searched refs:OFFSET (Results 1 – 25 of 143) sorted by relevance

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/openbmc/u-boot/board/siemens/rut/
H A Dmux.c28 {OFFSET(ddr_resetn), (MODE(0))},
30 {OFFSET(ddr_ck), (MODE(0))},
31 {OFFSET(ddr_nck), (MODE(0))},
54 {OFFSET(ddr_odt), (MODE(0))},
83 {OFFSET(gpmc_ad8), (MODE(1))},
84 {OFFSET(gpmc_ad9), (MODE(1))},
85 {OFFSET(gpmc_ad10), (MODE(1))},
86 {OFFSET(gpmc_ad11), (MODE(1))},
87 {OFFSET(gpmc_ad12), (MODE(1))},
88 {OFFSET(gpmc_ad13), (MODE(1))},
[all …]
/openbmc/linux/arch/s390/kernel/
H A Dasm-offsets.c34 OFFSET(__PT_PSW, pt_regs, psw); in main()
35 OFFSET(__PT_GPRS, pt_regs, gprs); in main()
36 OFFSET(__PT_R0, pt_regs, gprs[0]); in main()
37 OFFSET(__PT_R1, pt_regs, gprs[1]); in main()
38 OFFSET(__PT_R2, pt_regs, gprs[2]); in main()
39 OFFSET(__PT_R3, pt_regs, gprs[3]); in main()
40 OFFSET(__PT_R4, pt_regs, gprs[4]); in main()
41 OFFSET(__PT_R5, pt_regs, gprs[5]); in main()
42 OFFSET(__PT_R6, pt_regs, gprs[6]); in main()
43 OFFSET(__PT_R7, pt_regs, gprs[7]); in main()
[all …]
/openbmc/u-boot/board/siemens/draco/
H A Dmux.c34 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
36 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
65 {OFFSET(emu0), MODE(7)}, /* LED1 GPIO3_7 */
229 {OFFSET(mii1_col), (MODE(3) | RXACTIVE)},
230 {OFFSET(mii1_crs), (MODE(1) | RXACTIVE)},
232 {OFFSET(mii1_txen), (MODE(1))},
233 {OFFSET(mii1_rxdv), (MODE(3) | RXACTIVE)},
234 {OFFSET(mii1_txd3), (MODE(7) | RXACTIVE)},
236 {OFFSET(mii1_txd1), (MODE(1))},
237 {OFFSET(mii1_txd0), (MODE(1))},
[all …]
/openbmc/u-boot/board/bosch/shc/
H A Dmux.c108 {OFFSET(tdo), (MODE(0) | PULLUP_EN)},
110 {OFFSET(ntrst), (MODE(0) | RXACTIVE)},
114 {OFFSET(rsvd2), (MODE(0) | PULLUP_EN)},
176 {OFFSET(mii1_col), MODE(0) | RXACTIVE},
177 {OFFSET(mii1_crs), MODE(0) | RXACTIVE},
179 {OFFSET(mii1_txen), MODE(0)},
180 {OFFSET(mii1_rxdv), MODE(0) | RXACTIVE},
181 {OFFSET(mii1_txd3), MODE(0)},
182 {OFFSET(mii1_txd2), MODE(0)},
183 {OFFSET(mii1_txd1), MODE(0) | RXACTIVE},
[all …]
/openbmc/linux/arch/mips/kernel/
H A Dasm-offsets.c30 OFFSET(PT_R0, pt_regs, regs[0]); in output_ptreg_defines()
31 OFFSET(PT_R1, pt_regs, regs[1]); in output_ptreg_defines()
32 OFFSET(PT_R2, pt_regs, regs[2]); in output_ptreg_defines()
33 OFFSET(PT_R3, pt_regs, regs[3]); in output_ptreg_defines()
34 OFFSET(PT_R4, pt_regs, regs[4]); in output_ptreg_defines()
35 OFFSET(PT_R5, pt_regs, regs[5]); in output_ptreg_defines()
62 OFFSET(PT_LO, pt_regs, lo); in output_ptreg_defines()
63 OFFSET(PT_HI, pt_regs, hi); in output_ptreg_defines()
65 OFFSET(PT_ACX, pt_regs, acx); in output_ptreg_defines()
72 OFFSET(PT_MPL, pt_regs, mpl); in output_ptreg_defines()
[all …]
/openbmc/u-boot/board/BuR/brppt1/
H A Dmux.c20 {OFFSET(uart0_rtsn), (MODE(0) | PULLUDEN)},
26 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},
37 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)},
82 {OFFSET(mii1_txen), MODE(0)}, /* MII1_TXEN */
84 {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
85 {OFFSET(mii1_txd2), MODE(0)}, /* MII1_TXD2 */
100 {OFFSET(gpmc_a0), MODE(1)}, /* MII2_TXEN */
102 {OFFSET(gpmc_a2), MODE(1)}, /* MII2_TXD3 */
103 {OFFSET(gpmc_a3), MODE(1)}, /* MII2_TXD2 */
104 {OFFSET(gpmc_a4), MODE(1)}, /* MII2_TXD1 */
[all …]
/openbmc/linux/arch/powerpc/kernel/
H A Dasm-offsets.c80 OFFSET(MM, task_struct, mm); in main()
101 OFFSET(KSP, thread_struct, ksp); in main()
129 OFFSET(DAR, thread_struct, dar); in main()
132 OFFSET(THR0, thread_struct, r0); in main()
133 OFFSET(THR3, thread_struct, r3); in main()
134 OFFSET(THR4, thread_struct, r4); in main()
135 OFFSET(THR5, thread_struct, r5); in main()
136 OFFSET(THR6, thread_struct, r6); in main()
137 OFFSET(THR8, thread_struct, r8); in main()
138 OFFSET(THR9, thread_struct, r9); in main()
[all …]
/openbmc/u-boot/board/siemens/pxm2/
H A Dmux.c68 {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */
69 {OFFSET(mii1_txd2), MODE(2)}, /* RGMII1_TD2 */
84 {OFFSET(gpmc_a0), MODE(2)}, /* RGMII2_TCTL */
86 {OFFSET(gpmc_a2), MODE(2)}, /* RGMII2_TD3 */
87 {OFFSET(gpmc_a3), MODE(2)}, /* RGMII2_TD2 */
88 {OFFSET(gpmc_a4), MODE(2)}, /* RGMII2_TD1 */
89 {OFFSET(gpmc_a5), MODE(2)}, /* RGMII2_TD0 */
90 {OFFSET(gpmc_a6), MODE(7)}, /* RGMII2_TCLK */
93 {OFFSET(gpmc_a9), MODE(7)}, /* RGMII2_RD2 */
142 {OFFSET(lcd_pclk), (MODE(0))}, /* LCD_PCLK */
[all …]
/openbmc/u-boot/board/BuR/brxre1/
H A Dmux.c20 {OFFSET(spi0_sclk), MODE(0) | PULLUDEN | RXACTIVE},
22 {OFFSET(spi0_d0), MODE(0) | PULLUDEN | RXACTIVE},
24 {OFFSET(spi0_d1), MODE(0) | PULLUDEN | RXACTIVE},
36 {OFFSET(uart1_rtsn), MODE(2) | RXACTIVE},
44 {OFFSET(uart1_txd), MODE(2) | RXACTIVE},
56 {OFFSET(rmii1_refclk), (MODE(7) | PULLUDDIS)},
62 {OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)},
64 {OFFSET(gpmc_csn0), (MODE(7) | PULLUDDIS)},
70 {OFFSET(gpmc_wen), (MODE(7) | PULLUDDIS)},
72 {OFFSET(gpmc_be0n_cle), (MODE(7) | PULLUDDIS)},
[all …]
/openbmc/u-boot/board/ti/am335x/
H A Dmux.c108 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
110 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
116 {OFFSET(spi0_d1), (MODE(2) | RXACTIVE |
118 {OFFSET(spi0_cs0), (MODE(2) | RXACTIVE |
125 {OFFSET(spi0_d0), (MODE(0) | RXACTIVE |
128 {OFFSET(spi0_cs0), (MODE(0) | RXACTIVE |
163 {OFFSET(mii1_txen), MODE(0)}, /* MII1_TXEN */
165 {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
166 {OFFSET(mii1_txd2), MODE(0)}, /* MII1_TXD2 */
167 {OFFSET(mii1_txd1), MODE(0)}, /* MII1_TXD1 */
[all …]
/openbmc/linux/arch/loongarch/kernel/
H A Dasm-offsets.c20 OFFSET(PT_R0, pt_regs, regs[0]); in output_ptreg_defines()
21 OFFSET(PT_R1, pt_regs, regs[1]); in output_ptreg_defines()
22 OFFSET(PT_R2, pt_regs, regs[2]); in output_ptreg_defines()
23 OFFSET(PT_R3, pt_regs, regs[3]); in output_ptreg_defines()
24 OFFSET(PT_R4, pt_regs, regs[4]); in output_ptreg_defines()
25 OFFSET(PT_R5, pt_regs, regs[5]); in output_ptreg_defines()
26 OFFSET(PT_R6, pt_regs, regs[6]); in output_ptreg_defines()
27 OFFSET(PT_R7, pt_regs, regs[7]); in output_ptreg_defines()
28 OFFSET(PT_R8, pt_regs, regs[8]); in output_ptreg_defines()
29 OFFSET(PT_R9, pt_regs, regs[9]); in output_ptreg_defines()
[all …]
/openbmc/linux/arch/riscv/kernel/
H A Dasm-offsets.c80 OFFSET(PT_RA, pt_regs, ra); in asm_offsets()
81 OFFSET(PT_FP, pt_regs, s0); in asm_offsets()
82 OFFSET(PT_S0, pt_regs, s0); in asm_offsets()
83 OFFSET(PT_S1, pt_regs, s1); in asm_offsets()
84 OFFSET(PT_S2, pt_regs, s2); in asm_offsets()
85 OFFSET(PT_S3, pt_regs, s3); in asm_offsets()
86 OFFSET(PT_S4, pt_regs, s4); in asm_offsets()
87 OFFSET(PT_S5, pt_regs, s5); in asm_offsets()
88 OFFSET(PT_S6, pt_regs, s6); in asm_offsets()
89 OFFSET(PT_S7, pt_regs, s7); in asm_offsets()
[all …]
/openbmc/u-boot/board/compulab/cm_t43/
H A Dmux.c12 {OFFSET(mii1_txen), MODE(2)},
13 {OFFSET(mii1_txd3), MODE(2)},
14 {OFFSET(mii1_txd2), MODE(2)},
15 {OFFSET(mii1_txd1), MODE(2)},
16 {OFFSET(mii1_txd0), MODE(2)},
17 {OFFSET(mii1_txclk), MODE(2)},
28 {OFFSET(gpmc_a0), MODE(2)}, /* txen */
29 {OFFSET(gpmc_a2), MODE(2)}, /* txd3 */
30 {OFFSET(gpmc_a3), MODE(2)}, /* txd2 */
31 {OFFSET(gpmc_a4), MODE(2)}, /* txd1 */
[all …]
/openbmc/u-boot/board/ti/am43xx/
H A Dmux.c15 {OFFSET(mii1_txen), MODE(1)}, /* RMII1_TXEN */
16 {OFFSET(mii1_txd1), MODE(1)}, /* RMII1_TD1 */
17 {OFFSET(mii1_txd0), MODE(1)}, /* RMII1_TD0 */
18 {OFFSET(mii1_rxd1), MODE(1) | RXACTIVE}, /* RMII1_RD1 */
19 {OFFSET(mii1_rxd0), MODE(1) | RXACTIVE}, /* RMII1_RD0 */
28 {OFFSET(mii1_txen), MODE(2)}, /* RGMII1_TCTL */
30 {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */
31 {OFFSET(mii1_txd2), MODE(2)}, /* RGMII1_TD2 */
32 {OFFSET(mii1_txd1), MODE(2)}, /* RGMII1_TD1 */
33 {OFFSET(mii1_txd0), MODE(2)}, /* RGMII1_TD0 */
[all …]
/openbmc/linux/arch/x86/kernel/
H A Dasm-offsets.c37 OFFSET(TASK_threadsp, task_struct, thread.sp); in common()
43 OFFSET(pbe_address, pbe, address); in common()
44 OFFSET(pbe_orig_address, pbe, orig_address); in common()
45 OFFSET(pbe_next, pbe, next); in common()
49 OFFSET(IA32_SIGCONTEXT_ax, sigcontext_32, ax); in common()
50 OFFSET(IA32_SIGCONTEXT_bx, sigcontext_32, bx); in common()
93 OFFSET(BP_scratch, boot_params, scratch); in common()
114 OFFSET(TSS_sp0, tss_struct, x86_tss.sp0); in common()
115 OFFSET(TSS_sp1, tss_struct, x86_tss.sp1); in common()
116 OFFSET(TSS_sp2, tss_struct, x86_tss.sp2); in common()
[all …]
/openbmc/u-boot/board/birdland/bav335x/
H A Dmux.c86 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
88 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
94 {OFFSET(spi0_d1), (MODE(2) | RXACTIVE |
96 {OFFSET(spi0_cs0), (MODE(2) | RXACTIVE |
104 {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */
105 {OFFSET(mii1_txd2), MODE(2)}, /* RGMII1_TD2 */
121 {OFFSET(mii1_txen), MODE(0)}, /* MII1_TXEN */
123 {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
124 {OFFSET(mii1_txd2), MODE(0)}, /* MII1_TXD2 */
125 {OFFSET(mii1_txd1), MODE(0)}, /* MII1_TXD1 */
[all …]
/openbmc/u-boot/board/ti/ti814x/
H A Dmux.c31 {OFFSET(pincntl1), PULLUP_EN | MODE(0x01)}, /* SD1_CLK */
32 {OFFSET(pincntl2), PULLUP_EN | MODE(0x01)}, /* SD1_CMD */
38 {OFFSET(pincntl75), MODE(0x40)}, /* SD1_SDWP */
44 {OFFSET(pincntl232), MODE(0x01)}, /* EMAC_RMREFCLK */
47 {OFFSET(pincntl235), MODE(0x01)}, /* EMAC[0]_MTCLK */
48 {OFFSET(pincntl236), MODE(0x01)}, /* EMAC[0]_MCOL */
49 {OFFSET(pincntl237), MODE(0x01)}, /* EMAC[0]_MCRS */
50 {OFFSET(pincntl238), MODE(0x01)}, /* EMAC[0]_MRXER */
51 {OFFSET(pincntl239), MODE(0x01)}, /* EMAC[0]_MRCLK */
60 {OFFSET(pincntl248), MODE(0x01)}, /* EMAC[0]_MRXDV */
[all …]
/openbmc/u-boot/board/vscom/baltos/
H A Dmux.c41 {OFFSET(spi0_d1), (MODE(2) | RXACTIVE |
43 {OFFSET(spi0_cs0), (MODE(2) | RXACTIVE |
50 {OFFSET(mii1_txen), MODE(1)}, /* RGMII1_TCTL */
51 {OFFSET(mii1_txd1), MODE(1)}, /* RGMII1_TCTL */
52 {OFFSET(mii1_txd0), MODE(1)}, /* RGMII1_TCTL */
62 {OFFSET(gpmc_a0), MODE(2)}, /* RGMII1_TCTL */
64 {OFFSET(gpmc_a2), MODE(2)}, /* RGMII1_TD3 */
65 {OFFSET(gpmc_a3), MODE(2)}, /* RGMII1_TD2 */
66 {OFFSET(gpmc_a4), MODE(2)}, /* RGMII1_TD1 */
67 {OFFSET(gpmc_a5), MODE(2)}, /* RGMII1_TD0 */
[all …]
/openbmc/linux/arch/hexagon/kernel/
H A Dasm-offsets.c33 OFFSET(_PT_GPUGP, pt_regs, gpugp); in main()
35 OFFSET(_PT_R3130, pt_regs, r3130); in main()
36 OFFSET(_PT_R2928, pt_regs, r2928); in main()
37 OFFSET(_PT_R2726, pt_regs, r2726); in main()
38 OFFSET(_PT_R2524, pt_regs, r2524); in main()
39 OFFSET(_PT_R2322, pt_regs, r2322); in main()
40 OFFSET(_PT_R2120, pt_regs, r2120); in main()
41 OFFSET(_PT_R1918, pt_regs, r1918); in main()
42 OFFSET(_PT_R1716, pt_regs, r1716); in main()
43 OFFSET(_PT_R1514, pt_regs, r1514); in main()
[all …]
/openbmc/u-boot/arch/mips/lib/
H A Dasm-offsets.c20 OFFSET(PT_R0, pt_regs, regs[0]); in output_ptreg_defines()
21 OFFSET(PT_R1, pt_regs, regs[1]); in output_ptreg_defines()
22 OFFSET(PT_R2, pt_regs, regs[2]); in output_ptreg_defines()
23 OFFSET(PT_R3, pt_regs, regs[3]); in output_ptreg_defines()
24 OFFSET(PT_R4, pt_regs, regs[4]); in output_ptreg_defines()
25 OFFSET(PT_R5, pt_regs, regs[5]); in output_ptreg_defines()
26 OFFSET(PT_R6, pt_regs, regs[6]); in output_ptreg_defines()
27 OFFSET(PT_R7, pt_regs, regs[7]); in output_ptreg_defines()
28 OFFSET(PT_R8, pt_regs, regs[8]); in output_ptreg_defines()
52 OFFSET(PT_LO, pt_regs, lo); in output_ptreg_defines()
[all …]
/openbmc/linux/arch/nios2/kernel/
H A Dasm-offsets.c29 OFFSET(PT_R1, pt_regs, r1); in main()
30 OFFSET(PT_R2, pt_regs, r2); in main()
31 OFFSET(PT_R3, pt_regs, r3); in main()
32 OFFSET(PT_R4, pt_regs, r4); in main()
33 OFFSET(PT_R5, pt_regs, r5); in main()
34 OFFSET(PT_R6, pt_regs, r6); in main()
35 OFFSET(PT_R7, pt_regs, r7); in main()
36 OFFSET(PT_R8, pt_regs, r8); in main()
37 OFFSET(PT_R9, pt_regs, r9); in main()
44 OFFSET(PT_EA, pt_regs, ea); in main()
[all …]
/openbmc/u-boot/board/compulab/cm_t335/
H A Dmux.c17 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)},
18 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},
23 {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)},
24 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)},
26 {OFFSET(uart1_rtsn), (MODE(0) | PULLUDEN)},
55 {OFFSET(mii1_txen), MODE(2)}, /* RGMII1_TCTL */
57 {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */
58 {OFFSET(mii1_txd2), MODE(2)}, /* RGMII1_TD2 */
59 {OFFSET(mii1_txd1), MODE(2)}, /* RGMII1_TD1 */
60 {OFFSET(mii1_txd0), MODE(2)}, /* RGMII1_TD0 */
[all …]
/openbmc/u-boot/board/silica/pengwyn/
H A Dmux.c18 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
26 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
28 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
48 {OFFSET(mii1_txen), MODE(0)}, /* MII1_TXEN */
49 {OFFSET(mii1_rxdv), MODE(0) | RXACTIVE}, /* MII1_RXDV */
50 {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
51 {OFFSET(mii1_txd2), MODE(0)}, /* MII1_TXD2 */
52 {OFFSET(mii1_txd1), MODE(0)}, /* MII1_TXD1 */
53 {OFFSET(mii1_txd0), MODE(0)}, /* MII1_TXD0 */
56 {OFFSET(mii1_rxd3), MODE(0) | RXACTIVE}, /* MII1_RXD3 */
[all …]
/openbmc/u-boot/board/tcl/sl50/
H A Dmux.c18 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
30 {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */
77 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
79 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
85 {OFFSET(spi0_d1), (MODE(2) | RXACTIVE |
87 {OFFSET(spi0_cs0), (MODE(2) | RXACTIVE |
94 {OFFSET(mii1_txen), MODE(0)}, /* MII1_TXEN */
96 {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
97 {OFFSET(mii1_txd2), MODE(0)}, /* MII1_TXD2 */
98 {OFFSET(mii1_txd1), MODE(0)}, /* MII1_TXD1 */
[all …]
/openbmc/u-boot/arch/nds32/lib/
H A Dasm-offsets.c30 OFFSET(FTSMC020_BANK0_CR, ftsmc020, bank[0].cr); in main()
31 OFFSET(FTSMC020_BANK0_TPR, ftsmc020, bank[0].tpr); in main()
37 OFFSET(FTAHBC020S_CR, ftahbc02s, cr); in main()
41 OFFSET(FTPMU010_PDLLCR0, ftpmu010, PDLLCR0); in main()
45 OFFSET(FTSDMC021_TP1, ftsdmc021, tp1); in main()
46 OFFSET(FTSDMC021_TP2, ftsdmc021, tp2); in main()
47 OFFSET(FTSDMC021_CR1, ftsdmc021, cr1); in main()
48 OFFSET(FTSDMC021_CR2, ftsdmc021, cr2); in main()
49 OFFSET(FTSDMC021_BANK0_BSR, ftsdmc021, bank0_bsr); in main()
50 OFFSET(FTSDMC021_BANK1_BSR, ftsdmc021, bank1_bsr); in main()
[all …]

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