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/openbmc/linux/arch/arm/boot/dts/st/
H A Dstih407-clock.dtsi64 clockgen-a@90ff000 {
H A Dstih410-clock.dtsi69 clockgen-a@90ff000 {
H A Dstihxxx-b2120.dtsi136 /* HDMI V1.3a supports Standard mode only */
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-driver-typec-displayport57 operating in DisplayPort Alt Mode. This is a read only node which
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-evb-act8846.dts71 act8846: act8846@5a {
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623a-rfb-emmc.dts155 wm8960: wm8960@1a {
/openbmc/linux/arch/loongarch/include/asm/
H A Dpercpu.h20 # error compiler support for the model attribute is necessary when a recent assembler is used
/openbmc/linux/arch/mips/boot/dts/ingenic/
H A Dcu1000-neo.dts48 * Use the 32.768 kHz oscillator as the parent of the RTC for a higher
H A Dcu1830-neo.dts48 * Use the 32.768 kHz oscillator as the parent of the RTC for a higher
/openbmc/linux/arch/arm/boot/dts/intel/ixp/
H A Dintel-ixp42x-dlink-dsm-g600.dts18 compatible = "dlink,dsm-g600-a", "intel,ixp42x";
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dpm8916.dtsi83 channel@a {
H A Dsm8350-sony-xperia-sagami-pdx215.dts80 cam_pwr_a_cs: cam-pwr-a-cs-state {
/openbmc/linux/arch/arm/mach-s3c/
H A DKconfig.s3c64xx133 Select this if a fdt blob is available for your S3C64XX SoC based
/openbmc/linux/arch/arm/vfp/
H A Dvfphw.S38 @ FPEXC is in a safe state
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-t5325.dts114 alc5621: alc5621@1a {
H A Dkirkwood-b3.dts8 * Note: This requires a new'ish version of u-boot, which disables the
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8dxl-ss-conn.dtsi18 compatible = "nxp,imx8dxl-dwmac-eqos", "snps,dwmac-5.10a";
H A Dimx8mp-venice-gw71xx.dtsi127 /* dual role is implemented but not a full featured OTG */
/openbmc/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-a100-allwinner-perf1.dts36 * create a circular dependency between pinctrl, the regulator
H A Dsun50i-h5-orangepi-pc2.dts34 type = "a";
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx53-mba53.dts161 codec: sgtl5000@a {
/openbmc/linux/drivers/gpu/drm/exynos/
H A DKconfig13 Choose this option if you have a Samsung SoC Exynos chipset.
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dgpio-regulator.yaml58 no states in the "states" array, use a fixed regulator instead.
/openbmc/linux/arch/arm/boot/dts/nspire/
H A Dnspire.dtsi109 * There is some code to scale the clock down by a factor
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-ufs-phy.yaml13 The QMP PHY controller supports physical layer functionality for a number of

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