/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | cortina,gemini-ethernet.yaml | 65 clocking the silicon in this port
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/openbmc/openbmc/poky/documentation/ |
H A D | transitioning-to-a-custom-environment.rst | 35 best place to get your first BSP is from your silicon manufacturer or board 37 Intel silicon use meta-intel, for Texas Instruments use meta-ti, and so
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H A D | what-i-wish-id-known.rst | 47 #. **Use existing BSP layers from silicon vendors when possible:** 49 their silicon. These layers have names such as "meta-intel" or "meta-ti". Try 50 not to build layers from scratch. If you do have custom silicon, use one of
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/openbmc/u-boot/doc/device-tree-bindings/pinctrl/ |
H A D | marvell,mvebu-pinctrl.txt | 25 The A8K is a hybrid SoC that contains several silicon dies interconnected in
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/openbmc/linux/drivers/usb/typec/tcpm/ |
H A D | Kconfig | 85 discrete pieces of silicon in the PM8150b PMIC block: the
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/openbmc/linux/Documentation/devicetree/bindings/mmc/ |
H A D | sdhci-st.txt | 32 for eMMC on stih407 family silicon to configure DLL inside FlashSS.
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/openbmc/linux/arch/arm/boot/dts/ti/omap/ |
H A D | omap34xx.dtsi | 37 * first value is silicon revision bit mask
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H A D | omap36xx.dtsi | 45 * first value is silicon revision bit mask
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/openbmc/linux/Documentation/fb/ |
H A D | ep93xx-fb.rst | 126 At least on the EP9315 there is a silicon bug which causes bit 27 of
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/openbmc/linux/Documentation/admin-guide/ |
H A D | hw_random.rst | 64 mechanical properties of silicon. When not generating new random
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/openbmc/linux/Documentation/devicetree/bindings/thermal/ |
H A D | thermal-zones.yaml | 37 having the device in temperature ranges that may damage the silicon structures 38 and reduce silicon lifetime.
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/openbmc/u-boot/arch/arm/dts/ |
H A D | da850-lcdk.dts | 293 * with older silicon and because it needs new boot pin settings
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/openbmc/u-boot/board/freescale/ls1021aqds/ |
H A D | README | 15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark
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/openbmc/u-boot/board/freescale/ls1021atwr/ |
H A D | README | 15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark
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/openbmc/linux/Documentation/devicetree/bindings/hwmon/ |
H A D | moortec,mr75203.yaml | 21 *) Process Detector (PD) - used to assess silicon speed (e.g. mr74139).
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/openbmc/linux/arch/arm64/boot/dts/allwinner/ |
H A D | sun50i-h5.dtsi | 142 * PMU, the actual silicon does not have the PMU
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/openbmc/linux/arch/arm/boot/dts/aspeed/ |
H A D | aspeed-g4.dtsi | 204 silicon-id@7c { 205 compatible = "aspeed,ast2400-silicon-id", "aspeed,silicon-id";
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H A D | aspeed-g5.dtsi | 247 silicon-id@7c { 248 compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";
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H A D | aspeed-g6.dtsi | 349 silicon-id@14 { 350 compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id";
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/openbmc/u-boot/doc/ |
H A D | README.omap3 | 135 Read silicon Revision of the DMA module
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/openbmc/linux/Documentation/devicetree/bindings/opp/ |
H A D | opp-v2-kryo-cpu.yaml | 18 the silicon variant in use.
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/openbmc/linux/arch/powerpc/boot/dts/ |
H A D | mpc5125twr.dts | 3 * STx/Freescale ADS5125 MPC5125 silicon
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/openbmc/linux/Documentation/usb/ |
H A D | ehci.rst | 187 more silicon real estate at the problem so that new motherboard chip 189 updated implementation from NEC, as well as other vendors' silicon.
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/openbmc/linux/Documentation/devicetree/bindings/pci/ |
H A D | host-generic-pci.yaml | 48 ThunderX PCI host controller for pass-1.x silicon
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/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/ |
H A D | README.lsch3 | 42 pre-silicon platforms (simulator and emulator): 63 32-MB NOR flash layout for pre-silicon platforms (simulator and emulator)
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