/openbmc/libcper/sections/ |
H A D | cper-section-ia32x64.c | 858 json_object_object_get(registers, "cs")); in ir_ia32x64_ia32_registers_to_cper() 860 json_object_object_get(registers, "ds")); in ir_ia32x64_ia32_registers_to_cper() 862 json_object_object_get(registers, "ss")); in ir_ia32x64_ia32_registers_to_cper() 864 json_object_object_get(registers, "es")); in ir_ia32x64_ia32_registers_to_cper() 866 json_object_object_get(registers, "fs")); in ir_ia32x64_ia32_registers_to_cper() 868 json_object_object_get(registers, "gs")); in ir_ia32x64_ia32_registers_to_cper() 898 json_object_object_get(registers, "tr")); in ir_ia32x64_ia32_registers_to_cper() 943 json_object_object_get(registers, "cs")); in ir_ia32x64_x64_registers_to_cper() 945 json_object_object_get(registers, "ds")); in ir_ia32x64_x64_registers_to_cper() 947 json_object_object_get(registers, "ss")); in ir_ia32x64_x64_registers_to_cper() [all …]
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H A D | cper-section-arm.c | 34 void ir_arm_aarch32_gpr_to_cper(json_object *registers, FILE *out); 755 ir_to_uniform_struct(registers, (UINT32 *)®_array, in ir_arm_aarch32_gpr_to_cper() 769 ir_to_uniform_struct(registers, (UINT32 *)®_array, in ir_arm_aarch32_el1_to_cper() 784 ir_to_uniform_struct(registers, (UINT32 *)®_array, in ir_arm_aarch32_el2_to_cper() 799 ir_to_uniform_struct(registers, (UINT32 *)®_array, in ir_arm_aarch32_secure_to_cper() 814 ir_to_uniform_struct64(registers, (UINT64 *)®_array, in ir_arm_aarch64_gpr_to_cper() 828 ir_to_uniform_struct64(registers, (UINT64 *)®_array, in ir_arm_aarch64_el1_to_cper() 843 ir_to_uniform_struct64(registers, (UINT64 *)®_array, in ir_arm_aarch64_el2_to_cper() 858 ir_to_uniform_struct64(registers, (UINT64 *)®_array, in ir_arm_aarch64_el3_to_cper() 875 json_object_object_get(registers, "mrsEncoding"); in ir_arm_misc_registers_to_cper() [all …]
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/openbmc/linux/sound/soc/ux500/ |
H A D | ux500_msp_i2s.c | 294 msp->registers + MSP_MCR); in configure_multichannel() 296 msp->registers + MSP_TCE0); in configure_multichannel() 298 msp->registers + MSP_TCE1); in configure_multichannel() 300 msp->registers + MSP_TCE2); in configure_multichannel() 302 msp->registers + MSP_TCE3); in configure_multichannel() 315 msp->registers + MSP_MCR); in configure_multichannel() 334 msp->registers + MSP_MCR); in configure_multichannel() 495 msp->registers + MSP_IMSC); in disable_msp_rx() 511 msp->registers + MSP_IMSC); in disable_msp_tx() 527 msp->registers + MSP_GCR); in disable_msp() [all …]
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/openbmc/qemu/hw/dma/ |
H A D | xlnx_dpdma.c | 292 flags = ((s->registers[DPDMA_ISR] & (~s->registers[DPDMA_IMR])) in xlnx_dpdma_update_irq() 293 || (s->registers[DPDMA_EISR] & (~s->registers[DPDMA_EIMR]))); in xlnx_dpdma_update_irq() 411 return s->registers[offset]; in xlnx_dpdma_read() 515 s->registers[offset] = value; in xlnx_dpdma_write() 520 s->registers[offset] = value; in xlnx_dpdma_write() 525 s->registers[offset] = value; in xlnx_dpdma_write() 530 s->registers[offset] = value; in xlnx_dpdma_write() 535 s->registers[offset] = value; in xlnx_dpdma_write() 540 s->registers[offset] = value; in xlnx_dpdma_write() 545 s->registers[offset] = value; in xlnx_dpdma_write() [all …]
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/openbmc/linux/drivers/media/radio/si470x/ |
H A D | radio-si470x-common.c | 209 radio->registers[CHANNEL] &= ~CHANNEL_CHAN; in si470x_set_chan() 229 radio->registers[CHANNEL] &= ~CHANNEL_TUNE; in si470x_set_chan() 327 radio->registers[POWERCFG] |= POWERCFG_SEEK; in si470x_set_seek() 331 radio->registers[POWERCFG] |= POWERCFG_SKMODE; in si470x_set_seek() 333 radio->registers[POWERCFG] |= POWERCFG_SEEKUP; in si470x_set_seek() 354 radio->registers[POWERCFG] &= ~POWERCFG_SEEK; in si470x_set_seek() 372 radio->registers[POWERCFG] = in si470x_start() 390 radio->registers[SYSCONFIG2] = in si470x_start() 401 radio->registers[CHANNEL] & CHANNEL_CHAN); in si470x_start() 423 radio->registers[POWERCFG] &= ~POWERCFG_DMUTE; in si470x_stop() [all …]
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H A D | radio-si470x-i2c.c | 187 radio->registers[SYSCONFIG1] |= 0x1 << 2; in si470x_fops_open() 275 bler = (radio->registers[STATUSRSSI] & in si470x_i2c_interrupt() 277 rds = radio->registers[RDSA]; in si470x_i2c_interrupt() 280 bler = (radio->registers[READCHAN] & in si470x_i2c_interrupt() 282 rds = radio->registers[RDSB]; in si470x_i2c_interrupt() 285 bler = (radio->registers[READCHAN] & in si470x_i2c_interrupt() 287 rds = radio->registers[RDSC]; in si470x_i2c_interrupt() 290 bler = (radio->registers[READCHAN] & in si470x_i2c_interrupt() 292 rds = radio->registers[RDSD]; in si470x_i2c_interrupt() 396 radio->registers[POWERCFG] = POWERCFG_ENABLE; in si470x_i2c_probe() [all …]
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H A D | radio-si470x-usb.c | 388 radio->registers[STATUSRSSI] = in si470x_int_in_callback() 397 radio->registers[STATUSRSSI + regnr] = in si470x_int_in_callback() 412 bler = (radio->registers[STATUSRSSI] & in si470x_int_in_callback() 414 rds = radio->registers[RDSA]; in si470x_int_in_callback() 417 bler = (radio->registers[READCHAN] & in si470x_int_in_callback() 419 rds = radio->registers[RDSB]; in si470x_int_in_callback() 422 bler = (radio->registers[READCHAN] & in si470x_int_in_callback() 424 rds = radio->registers[RDSC]; in si470x_int_in_callback() 427 bler = (radio->registers[READCHAN] & in si470x_int_in_callback() 429 rds = radio->registers[RDSD]; in si470x_int_in_callback() [all …]
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/openbmc/linux/drivers/scsi/smartpqi/ |
H A D | smartpqi_sis.c | 106 &ctrl_info->registers->sis_mailbox[7])); in sis_wait_for_ctrl_ready_with_timeout() 151 readl(&ctrl_info->registers->sis_mailbox[7])); in sis_is_firmware_running() 175 struct pqi_ctrl_registers __iomem *registers; in sis_send_sync_cmd() local 181 registers = ctrl_info->registers; in sis_send_sync_cmd() 184 writel(cmd, ®isters->sis_mailbox[0]); in sis_send_sync_cmd() 191 writel(params->mailbox[i], ®isters->sis_mailbox[i]); in sis_send_sync_cmd() 195 ®isters->sis_ctrl_to_host_doorbell_clear); in sis_send_sync_cmd() 198 writel(~0, ®isters->sis_interrupt_mask); in sis_send_sync_cmd() 205 readl(®isters->sis_interrupt_mask); in sis_send_sync_cmd() 226 cmd_status = readl(®isters->sis_mailbox[0]); in sis_send_sync_cmd() [all …]
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/openbmc/linux/Documentation/driver-api/media/drivers/ccs/ |
H A D | ccs-regs.asc | 18 # general status registers 174 # analog gain registers 179 # digital gain registers 182 # hdr control registers 203 # clock set-up registers 221 # frame timing registers 225 # image size registers 233 # timing mode registers 243 # sub-sampling registers 391 # usl control registers [all …]
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | nxp,s32g2-siul2-pinctrl.yaml | 41 - description: MSCR registers group 0 in SIUL2_0 42 - description: MSCR registers group 1 in SIUL2_1 43 - description: MSCR registers group 2 in SIUL2_1 44 - description: IMCR registers group 0 in SIUL2_0 45 - description: IMCR registers group 1 in SIUL2_1 46 - description: IMCR registers group 2 in SIUL2_1 96 /* MSCR0-MSCR101 registers on siul2_0 */ 98 /* MSCR112-MSCR122 registers on siul2_1 */ 100 /* MSCR144-MSCR190 registers on siul2_1 */ 102 /* IMCR0-IMCR83 registers on siul2_0 */ [all …]
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/openbmc/linux/Documentation/devicetree/bindings/display/msm/ |
H A D | gmu.yaml | 93 - description: Core GMU registers 94 - description: GMU PDC registers 95 - description: GMU PDC sequence registers 125 - description: Core GMU registers 127 - description: GMU PDC registers 162 - description: Core GMU registers 163 - description: GMU PDC registers 164 - description: GMU PDC sequence registers 181 - description: Core GMU registers 183 - description: GMU PDC registers [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mips/ |
H A D | mscc.txt | 14 The SoC has a few registers (DEVCPU_GCB:CHIP_REGS) handling miscellaneous 20 - reg : Should contain registers location and length 31 The SoC has a few registers (ICPU_CFG:CPU_SYSTEM_CTRL) handling configuration of 32 the CPU: 8 general purpose registers, reset control, CPU en/disabling, CPU 37 - reg : Should contain registers location and length 47 The SoC has a few registers (HSIO) handling miscellaneous functionalities: 53 - reg : Should contain registers location and length
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/openbmc/linux/drivers/char/agp/ |
H A D | amd-k7-agp.c | 32 volatile u8 __iomem *registers; member 216 if (!amd_irongate_private.registers) { in amd_irongate_configure() 220 if (!amd_irongate_private.registers) in amd_irongate_configure() 226 readl(amd_irongate_private.registers+AMD_ATTBASE); /* PCI Posting. */ in amd_irongate_configure() 235 enable_reg = readw(amd_irongate_private.registers+AMD_GARTENABLE); in amd_irongate_configure() 237 writew(enable_reg, amd_irongate_private.registers+AMD_GARTENABLE); in amd_irongate_configure() 246 writel(1, amd_irongate_private.registers+AMD_TLBFLUSH); in amd_irongate_configure() 259 enable_reg = readw(amd_irongate_private.registers+AMD_GARTENABLE); in amd_irongate_cleanup() 261 writew(enable_reg, amd_irongate_private.registers+AMD_GARTENABLE); in amd_irongate_cleanup() 268 iounmap((void __iomem *) amd_irongate_private.registers); in amd_irongate_cleanup() [all …]
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H A D | sworks-agp.c | 39 volatile u8 __iomem *registers; member 240 writeb(1, serverworks_private.registers+SVWRKS_POSTFLUSH); in serverworks_tlbflush() 242 while (readb(serverworks_private.registers+SVWRKS_POSTFLUSH) == 1) { in serverworks_tlbflush() 251 writel(1, serverworks_private.registers+SVWRKS_DIRFLUSH); in serverworks_tlbflush() 253 while (readl(serverworks_private.registers+SVWRKS_DIRFLUSH) == 1) { in serverworks_tlbflush() 273 if (!serverworks_private.registers) { in serverworks_configure() 278 writeb(0xA, serverworks_private.registers+SVWRKS_GART_CACHE); in serverworks_configure() 284 cap_reg = readw(serverworks_private.registers+SVWRKS_COMMAND); in serverworks_configure() 287 writew(cap_reg, serverworks_private.registers+SVWRKS_COMMAND); in serverworks_configure() 288 readw(serverworks_private.registers+SVWRKS_COMMAND); in serverworks_configure() [all …]
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/openbmc/linux/drivers/gpio/ |
H A D | gpio-74x164.c | 24 u32 registers; member 38 chip->registers); in __gen_74x164_write_config() 44 u8 bank = chip->registers - 1 - offset / 8; in gen_74x164_get_value() 59 u8 bank = chip->registers - 1 - offset / 8; in gen_74x164_set_value() 82 for_each_set_clump8(offset, bankmask, mask, chip->registers * 8) { in gen_74x164_set_multiple() 83 bank = chip->registers - 1 - offset / 8; in gen_74x164_set_multiple() 139 chip->registers = nregs; in gen_74x164_probe() 140 chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers; in gen_74x164_probe()
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/openbmc/linux/Documentation/devicetree/bindings/thermal/ |
H A D | rcar-gen3-thermal.yaml | 71 - description: TSC0 registers 72 - description: TSC1 registers 73 - description: TSC2 registers 74 - description: TSC3 registers 75 - description: TSC4 registers 81 - description: TSC1 registers 82 - description: TSC2 registers 83 - description: TSC3 registers 84 - description: TSC4 registers
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/openbmc/u-boot/arch/arm/lib/ |
H A D | vectors_m.S | 13 mov r0, sp @ pass auto-saved registers as argument 18 mov r0, sp @ pass auto-saved registers as argument 23 mov r0, sp @ pass auto-saved registers as argument 28 mov r0, sp @ pass auto-saved registers as argument 33 mov r0, sp @ pass auto-saved registers as argument
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/openbmc/linux/Documentation/devicetree/bindings/mailbox/ |
H A D | microchip,mpfs-mailbox.yaml | 19 - description: mailbox control & data registers 20 - description: mailbox interrupt registers 23 - description: mailbox control registers 24 - description: mailbox interrupt registers 25 - description: mailbox data registers
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/openbmc/linux/drivers/gpu/drm/msm/adreno/ |
H A D | a6xx_gpu_state.c | 22 struct a6xx_gpu_state_obj *registers; member 771 regs->registers[i] + j); in a6xx_get_ahb_gpu_registers() 899 if (!a6xx_state->registers) in a6xx_get_registers() 907 &a6xx_state->registers[index++]); in a6xx_get_registers() 912 &a6xx_state->registers[index++]); in a6xx_get_registers() 935 &a6xx_state->registers[index++], in a6xx_get_registers() 941 &a6xx_state->registers[index++], in a6xx_get_registers() 1133 u32 count = RANGE(registers, i); in a6xx_show_registers() 1134 u32 offset = registers[i]; in a6xx_show_registers() 1213 u32 count = RANGE(registers, j); in a6xx_show_cluster_data() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/powerpc/nintendo/ |
H A D | wii.txt | 31 - reg : should contain the VI registers location and length 42 - reg : should contain the PI registers location and length 64 - reg : should contain the DSP registers location and length 76 - reg : should contain the SI registers location and length 87 - reg : should contain the AI registers location and length 97 - reg : should contain the EXI registers location and length 107 - reg : should contain the EHCI registers location and length 117 - reg : should contain the SDHCI registers location and length 126 - reg : should contain the IPC registers location and length 155 - reg : should contain the control registers location and length [all …]
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/openbmc/linux/Documentation/devicetree/bindings/arm/ |
H A D | atmel-sysregs.txt | 1 Atmel system registers 5 - reg : Should contain registers location and length 9 - reg: Should contain registers location and length 15 - reg: Should contain registers location and length 21 - reg: Should contain registers location and length 35 - reg: Should contain registers location and length 46 - reg: Should contain registers location and length 66 - reg: Should contain registers location and length 85 - reg: Should contain registers location and length
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/openbmc/linux/Documentation/arch/sh/ |
H A D | register-banks.rst | 17 In the case of this type of banking, banked registers are mapped directly to 19 can still be used to reference the banked registers (as r0_bank ... r7_bank) 21 in mind when writing code that utilizes these banked registers, for obvious 23 be used rather effectively as scratch registers by the kernel. 25 Presently the kernel uses several of these registers. 28 registers when doing exception handling).
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/openbmc/linux/Documentation/devicetree/bindings/arm/marvell/ |
H A D | coherency-fabric.txt | 18 - reg: Should contain coherency fabric registers location and 22 fabric registers, second pair for the per-CPU fabric registers. 25 for the per-CPU fabric registers. 28 for the per-CPU fabric registers.
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/openbmc/linux/drivers/media/platform/rockchip/rkisp1/ |
H A D | rkisp1-debug.c | 67 static const struct rkisp1_debug_register registers[] = { in rkisp1_debug_dump_core_regs_show() local 83 return rkisp1_debug_dump_regs(rkisp1, m, 0, registers); in rkisp1_debug_dump_core_regs_show() 89 static const struct rkisp1_debug_register registers[] = { in rkisp1_debug_dump_isp_regs_show() local 99 return rkisp1_debug_dump_regs(rkisp1, m, 0, registers); in rkisp1_debug_dump_isp_regs_show() 105 static const struct rkisp1_debug_register registers[] = { in rkisp1_debug_dump_rsz_regs_show() local 120 return rkisp1_debug_dump_regs(rsz->rkisp1, m, rsz->regs_base, registers); in rkisp1_debug_dump_rsz_regs_show() 126 static const struct rkisp1_debug_register registers[] = { in rkisp1_debug_dump_mi_mp_show() local 138 return rkisp1_debug_dump_regs(rkisp1, m, 0, registers); in rkisp1_debug_dump_mi_mp_show()
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/openbmc/linux/Documentation/devicetree/bindings/spmi/ |
H A D | qcom,spmi-pmic-arb.yaml | 30 - description: core registers 31 - description: interrupt controller registers 32 - description: configuration registers 34 - description: core registers 36 - description: rx-channel (called observer) per virtual slave registers 37 - description: interrupt controller registers 38 - description: configuration registers
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