| /openbmc/linux/drivers/clk/imx/ |
| H A D | clk-scu.c | 56 u32 rate; member
86 __le32 rate; member
97 __le32 rate; member
285 return rate; in clk_scu_round_rate()
330 msg.rate = cpu_to_le32(rate); in clk_scu_set_rate()
603 if (clk->rate) in imx_clk_scu_suspend()
629 if (clk->rate) { in imx_clk_scu_resume()
757 if (rate < *prate) in clk_gpr_div_scu_round_rate()
758 rate = *prate / 2; in clk_gpr_div_scu_round_rate()
760 rate = *prate; in clk_gpr_div_scu_round_rate()
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| H A D | clk-sscg-pll.c | 275 temp_setup.fout_request = rate; in clk_sscg_pll_find_setup()
279 if (prate == rate) { in clk_sscg_pll_find_setup()
281 setup->fout = rate; in clk_sscg_pll_find_setup()
415 uint64_t rate, in __clk_sscg_pll_determine_rate() argument
443 rate, bypass); in __clk_sscg_pll_determine_rate()
448 req->rate = setup->fout; in __clk_sscg_pll_determine_rate()
458 uint64_t rate = req->rate; in clk_sscg_pll_determine_rate() local
463 if (rate < PLL_OUT_MIN_FREQ || rate > PLL_OUT_MAX_FREQ) in clk_sscg_pll_determine_rate()
466 ret = __clk_sscg_pll_determine_rate(hw, req, req->rate, req->rate, in clk_sscg_pll_determine_rate()
467 rate, PLL_BYPASS2); in clk_sscg_pll_determine_rate()
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| /openbmc/linux/drivers/i2c/busses/ |
| H A D | i2c-synquacer.c | 22 #define WAIT_PCLK(n, rate) \ argument
66 #define SYNQUACER_I2C_BUS_CLK_FR(rate) (((rate) / 20000000) + 1) argument
69 #define SYNQUACER_I2C_CLK_MASTER_STD(rate) \ argument
72 #define SYNQUACER_I2C_CLK_MASTER_FAST(rate) \ argument
77 #define SYNQUACER_I2C_CCR_CS_STD_MAX_18M(rate) \ argument
78 ((SYNQUACER_I2C_CLK_MASTER_STD(rate) - 65) \
86 ((SYNQUACER_I2C_CLK_MASTER_FAST(rate) - 1) \
94 #define SYNQUACER_I2C_CCR_CS_STD_MIN_18M(rate) \ argument
95 ((SYNQUACER_I2C_CLK_MASTER_STD(rate) - 1) \
99 #define SYNQUACER_I2C_CSR_CS_STD_MIN_18M(rate) \ argument
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| /openbmc/linux/arch/arm64/boot/dts/xilinx/ |
| H A D | zynqmp-zc1751-xm019-dc5.dts | 119 slew-rate = <SLEW_RATE_SLOW>;
132 slew-rate = <SLEW_RATE_SLOW>;
146 slew-rate = <SLEW_RATE_SLOW>;
159 slew-rate = <SLEW_RATE_SLOW>;
172 slew-rate = <SLEW_RATE_SLOW>;
195 slew-rate = <SLEW_RATE_SLOW>;
218 slew-rate = <SLEW_RATE_SLOW>;
243 slew-rate = <SLEW_RATE_SLOW>;
257 slew-rate = <SLEW_RATE_SLOW>;
271 slew-rate = <SLEW_RATE_SLOW>;
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| /openbmc/linux/drivers/gpu/drm/msm/hdmi/ |
| H A D | hdmi_pll_8960.c | 31 unsigned long rate; member
357 static const struct pll_rate *find_rate(unsigned long rate) in find_rate() argument
362 if (rate > freqtbl[i].rate) in find_rate()
376 static long hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, in hdmi_pll_round_rate() argument
379 const struct pll_rate *pll_rate = find_rate(rate); in hdmi_pll_round_rate()
381 return pll_rate->rate; in hdmi_pll_round_rate()
384 static int hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate, in hdmi_pll_set_rate() argument
388 const struct pll_rate *pll_rate = find_rate(rate); in hdmi_pll_set_rate()
391 DBG("rate=%lu", rate); in hdmi_pll_set_rate()
396 pll->pixclk = rate; in hdmi_pll_set_rate()
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| /openbmc/linux/drivers/clk/sprd/ |
| H A D | div.c | 12 static long sprd_div_round_rate(struct clk_hw *hw, unsigned long rate, in sprd_div_round_rate() argument
17 return divider_round_rate(&cd->common.hw, rate, parent_rate, NULL, in sprd_div_round_rate()
47 unsigned long rate, in sprd_div_helper_set_rate() argument
53 val = divider_get_val(rate, parent_rate, NULL, in sprd_div_helper_set_rate()
67 static int sprd_div_set_rate(struct clk_hw *hw, unsigned long rate, in sprd_div_set_rate() argument
73 rate, parent_rate); in sprd_div_set_rate()
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| /openbmc/linux/drivers/clocksource/ |
| H A D | mps2-timer.c | 103 u32 rate; in mps2_clockevent_init() local
107 ret = of_property_read_u32(np, "clock-frequency", &rate); in mps2_clockevent_init()
122 rate = clk_get_rate(clk); in mps2_clockevent_init()
146 ce->clock_count_per_tick = DIV_ROUND_CLOSEST(rate, HZ); in mps2_clockevent_init()
166 clockevents_config_and_register(&ce->clkevt, rate, 0xf, 0xffffffff); in mps2_clockevent_init()
187 u32 rate; in mps2_clocksource_init() local
191 ret = of_property_read_u32(np, "clock-frequency", &rate); in mps2_clocksource_init()
206 rate = clk_get_rate(clk); in mps2_clocksource_init()
226 rate, 200, 32, in mps2_clocksource_init()
234 sched_clock_register(mps2_sched_read, 32, rate); in mps2_clocksource_init()
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| H A D | ingenic-sysost.c | 124 if ((rate >> (prescale * 2)) <= req_rate) in ingenic_ost_get_prescale()
133 unsigned long rate = *parent_rate; in ingenic_ost_round_rate() local
136 if (req_rate > rate) in ingenic_ost_round_rate()
137 return rate; in ingenic_ost_round_rate()
141 return rate >> (prescale * 2); in ingenic_ost_round_rate()
317 unsigned long rate; in ingenic_ost_percpu_timer_init() local
329 if (!rate) { in ingenic_ost_percpu_timer_init()
372 unsigned long rate; in ingenic_ost_global_timer_init() local
384 if (!rate) { in ingenic_ost_global_timer_init()
401 err = clocksource_register_hz(cs, rate); in ingenic_ost_global_timer_init()
[all …]
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| H A D | armv7m_systick.c | 29 u32 rate; in system_timer_of_register() local
38 ret = of_property_read_u32(np, "clock-frequency", &rate); in system_timer_of_register()
50 rate = clk_get_rate(clk); in system_timer_of_register()
51 if (!rate) { in system_timer_of_register()
60 ret = clocksource_mmio_init(base + SYST_CVR, "arm_system_timer", rate, in system_timer_of_register()
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| /openbmc/linux/drivers/memory/tegra/ |
| H A D | tegra210-emc-core.c | 861 if (emc->timings[i].rate * 1000UL == rate) in tegra210_emc_find_timing()
941 u32 temp = 0, rate = next->rate / 1000; in tegra210_emc_compensate() local
1175 if (emc->next->rate >= 400000 && emc->next->rate < 600000) in tegra210_emc_dll_prelock()
1533 unsigned long rate = config->rate; in tegra210_emc_set_rate() local
1538 if (rate == emc->last->rate * 1000UL) in tegra210_emc_set_rate()
1542 if (emc->timings[i].rate * 1000UL == rate) { in tegra210_emc_set_rate()
1602 if (rate == emc->timings[i].rate * 1000UL) in tegra210_emc_validate_rate()
1794 u32 rate = timings[i].rate; in tegra210_emc_validate_timings() local
1796 if (!rate) in tegra210_emc_validate_timings()
1799 if ((i > 0) && ((rate <= timings[i - 1].rate) || in tegra210_emc_validate_timings()
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| /openbmc/linux/sound/soc/mediatek/mt8188/ |
| H A D | mt8188-dai-adda.c | 60 unsigned int rate) in afe_adda_dl_rate_transform() argument
62 switch (rate) { in afe_adda_dl_rate_transform()
87 __func__, rate); in afe_adda_dl_rate_transform()
93 unsigned int rate) in afe_adda_ul_rate_transform() argument
95 switch (rate) { in afe_adda_ul_rate_transform()
110 __func__, rate); in afe_adda_ul_rate_transform()
435 unsigned int rate, int id) in mtk_dai_da_configure() argument
457 if (rate == 8000 || rate == 16000) in mtk_dai_da_configure()
470 unsigned int rate, int id) in mtk_dai_ad_configure() argument
491 unsigned int rate = params_rate(params); in mtk_dai_adda_hw_params() local
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| /openbmc/linux/Documentation/networking/device_drivers/ethernet/ti/ |
| H A D | cpsw.rst | 30 potential incoming rate, thus, rate of all incoming tx queues has
280 Receiving data rate: 39012 kbps
281 Receiving data rate: 39012 kbps
282 Receiving data rate: 39012 kbps
283 Receiving data rate: 39012 kbps
284 Receiving data rate: 39012 kbps
285 Receiving data rate: 39012 kbps
286 Receiving data rate: 39012 kbps
287 Receiving data rate: 39012 kbps
288 Receiving data rate: 39012 kbps
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| /openbmc/linux/sound/pci/ice1712/ |
| H A D | juli.c | 140 static int get_gpio_val(int rate) in get_gpio_val() argument
144 if (juli_rates[i] == rate) in get_gpio_val()
171 int rate; in juli_spdif_in_open() local
177 if (rate >= runtime->hw.rate_min && rate <= runtime->hw.rate_max) { in juli_spdif_in_open()
178 runtime->hw.rate_min = rate; in juli_spdif_in_open()
179 runtime->hw.rate_max = rate; in juli_spdif_in_open()
220 if (rate > 96000) { in juli_akm_set_rate_val()
223 } else if (rate > 48000) { in juli_akm_set_rate_val()
512 unsigned int rate) in juli_set_mclk() argument
534 int rate; in juli_ak4114_change() local
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| /openbmc/linux/drivers/clk/ti/ |
| H A D | divider.c | 163 return DIV_ROUND_UP(parent_rate, rate); in _div_round()
165 return _div_round_up(table, parent_rate, rate); in _div_round()
176 if (!rate) in ti_clk_divider_bestdiv()
177 rate = 1; in ti_clk_divider_bestdiv()
193 maxdiv = min(ULONG_MAX / rate, maxdiv); in ti_clk_divider_bestdiv()
198 if (rate * i == parent_rate_saved) { in ti_clk_divider_bestdiv()
208 MULT_ROUND_UP(rate, i)); in ti_clk_divider_bestdiv()
210 if (now <= rate && now > best) { in ti_clk_divider_bestdiv()
230 div = ti_clk_divider_bestdiv(hw, rate, prate); in ti_clk_divider_round_rate()
242 if (!hw || !rate) in ti_clk_divider_set_rate()
[all …]
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| /openbmc/linux/drivers/clk/stm32/ |
| H A D | clk-stm32-core.c | 341 return rate; in clk_stm32_divider_set_rate()
359 return rate; in clk_stm32_divider_round_rate()
405 return rate; in clk_stm32_composite_set_rate()
434 long rate; in clk_stm32_composite_determine_rate() local
448 rate = divider_ro_round_rate(hw, req->rate, &req->best_parent_rate, in clk_stm32_composite_determine_rate()
451 if (rate < 0) in clk_stm32_composite_determine_rate()
452 return rate; in clk_stm32_composite_determine_rate()
454 req->rate = rate; in clk_stm32_composite_determine_rate()
461 if (rate < 0) in clk_stm32_composite_determine_rate()
462 return rate; in clk_stm32_composite_determine_rate()
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | atmel,sama5d2-adc.yaml | 34 atmel,min-sample-rate-hz:
35 description: Minimum sampling rate, it depends on SoC.
37 atmel,max-sample-rate-hz:
38 description: Maximum sampling rate, it depends on SoC.
71 - atmel,min-sample-rate-hz
72 - atmel,max-sample-rate-hz
89 atmel,min-sample-rate-hz = <200000>;
90 atmel,max-sample-rate-hz = <20000000>;
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| /openbmc/linux/drivers/clk/xilinx/ |
| H A D | clk-xlnx-clock-wizard.c | 178 value = DIV_ROUND_CLOSEST(parent_rate, rate); in clk_wzrd_dynamic_reconfig()
221 div = DIV_ROUND_CLOSEST(*prate, rate); in clk_wzrd_round_rate()
239 diff = abs(freq - rate); in clk_wzrd_get_divisors()
344 err = clk_wzrd_get_divisors(hw, rate, *prate); in clk_wzrd_round_rate_all()
356 if (rate > int_freq) { in clk_wzrd_round_rate_all()
360 return rate; in clk_wzrd_round_rate_all()
435 return rate; in clk_wzrd_round_rate_f()
595 unsigned long rate; in clk_wzrd_probe() local
636 rate = clk_get_rate(clk_wzrd->axi_clk); in clk_wzrd_probe()
637 if (rate > WZRD_ACLK_MAX_FREQ) { in clk_wzrd_probe()
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| /openbmc/linux/drivers/clk/ |
| H A D | clk-scpi.c | 35 static long scpi_clk_round_rate(struct clk_hw *hw, unsigned long rate, in scpi_clk_round_rate() argument
44 return rate; in scpi_clk_round_rate()
47 static int scpi_clk_set_rate(struct clk_hw *hw, unsigned long rate, in scpi_clk_set_rate() argument
52 return clk->scpi_ops->clk_set_val(clk->id, rate); in scpi_clk_set_rate()
62 static long __scpi_dvfs_round_rate(struct scpi_clk *clk, unsigned long rate) in __scpi_dvfs_round_rate() argument
70 if (ftmp >= rate) { in __scpi_dvfs_round_rate()
95 static long scpi_dvfs_round_rate(struct clk_hw *hw, unsigned long rate, in scpi_dvfs_round_rate() argument
100 return __scpi_dvfs_round_rate(clk, rate); in scpi_dvfs_round_rate()
109 if (opp->freq == rate) in __scpi_find_dvfs_index()
114 static int scpi_dvfs_set_rate(struct clk_hw *hw, unsigned long rate, in scpi_dvfs_set_rate() argument
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| /openbmc/linux/Documentation/devicetree/bindings/serial/ |
| H A D | nvidia,tegra20-hsuart.yaml | 61 List of entries providing percentage of baud rate adjustment within a range. Each entry
62 contains a set of 3 values: range low/high and adjusted rate. When the baud rate set on the
63 controller falls within the range mentioned in this field, the baud rate will be adjusted by
68 Increase baud rate by 2% when set baud rate falls within range 9600 to 115200.
70 Standard UART devices are expected to have tolerance for baud rate error by -4 to +4 %. All
72 issue. UART RX baud rate tolerance level is 0% to +4% in 1-stop config. Otherwise, the
74 baud rate to be higher than the deviations observed in TX.
77 valid range and Tegra baud rate has to be set above actual TX baud rate observed. To do this
82 Tegra UART is expected to handle it. Due to the issue stated above, baud rate on Tegra UART
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| /openbmc/linux/sound/pci/echoaudio/ |
| H A D | echoaudio_3g.c | 149 switch (rate) { in set_spdif_bits()
258 static int set_sample_rate(struct echoaudio *chip, u32 rate) in set_sample_rate() argument
267 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
268 chip->sample_rate = rate; in set_sample_rate()
273 if (snd_BUG_ON(rate >= 50000 && in set_sample_rate()
281 switch (rate) { in set_sample_rate()
299 if (rate > 50000) in set_sample_rate()
305 control_reg = set_spdif_bits(chip, control_reg, rate); in set_sample_rate()
307 base_rate = rate; in set_sample_rate()
318 chip->sample_rate = rate; in set_sample_rate()
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| /openbmc/linux/sound/soc/mediatek/mt8183/ |
| H A D | mt8183-dai-adda.c | 51 unsigned int rate) in adda_dl_rate_transform() argument
53 switch (rate) { in adda_dl_rate_transform()
78 __func__, rate); in adda_dl_rate_transform()
84 unsigned int rate) in adda_ul_rate_transform() argument
86 switch (rate) { in adda_ul_rate_transform()
101 __func__, rate); in adda_ul_rate_transform()
358 unsigned int rate = params_rate(params); in mtk_dai_adda_hw_params() local
361 __func__, dai->id, substream->stream, rate); in mtk_dai_adda_hw_params()
375 switch (rate) { in mtk_dai_adda_hw_params()
393 if (rate == 8000 || rate == 16000) in mtk_dai_adda_hw_params()
[all …]
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| /openbmc/linux/drivers/mmc/host/ |
| H A D | sdhci-milbeaut.c | 40 #define MLB_CAL_TOCLKFREQ_MHZ(rate) (rate / MLB_SD_TOCLK_I_DIV / 1000000) argument
41 #define MLB_CAL_TOCLKFREQ_KHZ(rate) (rate / MLB_SD_TOCLK_I_DIV / 1000) argument
46 #define MLB_CAL_BCLKFREQ(rate) (rate / MLB_SD_BCLK_I_DIV / 1000000) argument
144 int rate) in sdhci_milbeaut_bridge_init() argument
152 if (rate >= MLB_TOCLKFREQ_UNIT_THRES) { in sdhci_milbeaut_bridge_init()
153 clk = MLB_CAL_TOCLKFREQ_MHZ(rate); in sdhci_milbeaut_bridge_init()
158 clk = MLB_CAL_TOCLKFREQ_KHZ(rate); in sdhci_milbeaut_bridge_init()
164 clk = MLB_CAL_BCLKFREQ(rate); in sdhci_milbeaut_bridge_init()
213 int rate = clk_get_rate(priv->clk); in sdhci_milbeaut_init() local
224 sdhci_milbeaut_bridge_init(host, rate); in sdhci_milbeaut_init()
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| /openbmc/linux/drivers/clk/ux500/ |
| H A D | clk-prcmu.c | 60 return prcmu_round_clock_rate(clk->cg_sel, rate); in clk_prcmu_round_rate()
67 return prcmu_set_clock_rate(clk->cg_sel, rate); in clk_prcmu_set_rate()
197 unsigned long rate, in clk_reg_prcmu() argument
217 if (rate) in clk_reg_prcmu()
218 prcmu_set_clock_rate(cg_sel, rate); in clk_reg_prcmu()
242 unsigned long rate, in clk_reg_prcmu_scalable() argument
245 return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags, in clk_reg_prcmu_scalable()
261 unsigned long rate, in clk_reg_prcmu_scalable_rate() argument
264 return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags, in clk_reg_prcmu_scalable_rate()
289 unsigned long rate, in clk_reg_prcmu_opp_volt_scalable() argument
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| /openbmc/u-boot/board/gdsys/common/ |
| H A D | cmd_ioloop.c | 170 unsigned int rate = 0; in do_ioreflect() local
182 rate = simple_strtoul(argv[2], NULL, 10); in do_ioreflect()
204 if (rate) { in do_ioreflect()
205 if (!(tx_ctr % rate) && (tx_ctr != last_seen)) in do_ioreflect()
229 unsigned int rate = 0; in do_ioloop() local
248 rate = simple_strtoul(argv[3], NULL, 10); in do_ioloop()
271 if (rate) { in do_ioloop()
274 udelay(1000000 / rate); in do_ioloop()
275 if (!(tx_ctr % rate)) in do_ioloop()
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| /openbmc/u-boot/drivers/usb/phy/ |
| H A D | omap_usb_phy.c | 34 unsigned long rate; member
51 unsigned long rate; in omap_usb3_get_dpll_params() local
54 rate = get_sys_clk_freq(); in omap_usb3_get_dpll_params()
56 for (; dpll_map->rate; dpll_map++) { in omap_usb3_get_dpll_params()
57 if (rate == dpll_map->rate) in omap_usb3_get_dpll_params()
61 dev_err(phy->dev, "No DPLL configuration for %lu Hz SYS CLK\n", rate); in omap_usb3_get_dpll_params()
117 u32 rate = get_sys_clk_freq()/1000000; in usb3_phy_partial_powerup() local
123 val |= rate << USB3_PWRCTL_CLK_FREQ_SHIFT; in usb3_phy_partial_powerup()
|