1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2ba55453cSDan Murphy /*
3ba55453cSDan Murphy * OMAP USB PHY Support
4ba55453cSDan Murphy *
5ba55453cSDan Murphy * (C) Copyright 2013
6ba55453cSDan Murphy * Texas Instruments, <www.ti.com>
7ba55453cSDan Murphy *
8ba55453cSDan Murphy * Author: Dan Murphy <dmurphy@ti.com>
9ba55453cSDan Murphy */
10ba55453cSDan Murphy
11ba55453cSDan Murphy #include <common.h>
12ba55453cSDan Murphy #include <usb.h>
135d97dff0SMasahiro Yamada #include <linux/errno.h>
14ba55453cSDan Murphy #include <asm/omap_common.h>
15ba55453cSDan Murphy #include <asm/arch/cpu.h>
16ba55453cSDan Murphy #include <asm/arch/sys_proto.h>
17ba55453cSDan Murphy
18ba55453cSDan Murphy #include <linux/compat.h>
19ba55453cSDan Murphy #include <linux/usb/dwc3.h>
20ba55453cSDan Murphy #include <linux/usb/xhci-omap.h>
21ba55453cSDan Murphy
22ba55453cSDan Murphy #include "../host/xhci.h"
23ba55453cSDan Murphy
24834e91afSDan Murphy #ifdef CONFIG_OMAP_USB3PHY1_HOST
2568a775a7SRoger Quadros struct usb3_dpll_params {
26ba55453cSDan Murphy u16 m;
27ba55453cSDan Murphy u8 n;
28ba55453cSDan Murphy u8 freq:3;
29ba55453cSDan Murphy u8 sd;
30ba55453cSDan Murphy u32 mf;
31ba55453cSDan Murphy };
32ba55453cSDan Murphy
3368a775a7SRoger Quadros struct usb3_dpll_map {
3468a775a7SRoger Quadros unsigned long rate;
3568a775a7SRoger Quadros struct usb3_dpll_params params;
3668a775a7SRoger Quadros struct usb3_dpll_map *dpll_map;
37ba55453cSDan Murphy };
38ba55453cSDan Murphy
3968a775a7SRoger Quadros static struct usb3_dpll_map dpll_map_usb[] = {
4068a775a7SRoger Quadros {12000000, {1250, 5, 4, 20, 0} }, /* 12 MHz */
4168a775a7SRoger Quadros {16800000, {3125, 20, 4, 20, 0} }, /* 16.8 MHz */
4268a775a7SRoger Quadros {19200000, {1172, 8, 4, 20, 65537} }, /* 19.2 MHz */
4368a775a7SRoger Quadros {20000000, {1000, 7, 4, 10, 0} }, /* 20 MHz */
4468a775a7SRoger Quadros {26000000, {1250, 12, 4, 20, 0} }, /* 26 MHz */
4568a775a7SRoger Quadros {38400000, {3125, 47, 4, 20, 92843} }, /* 38.4 MHz */
4668a775a7SRoger Quadros { }, /* Terminator */
4768a775a7SRoger Quadros };
4868a775a7SRoger Quadros
omap_usb3_get_dpll_params(void)4968a775a7SRoger Quadros static struct usb3_dpll_params *omap_usb3_get_dpll_params(void)
5068a775a7SRoger Quadros {
5168a775a7SRoger Quadros unsigned long rate;
5268a775a7SRoger Quadros struct usb3_dpll_map *dpll_map = dpll_map_usb;
5368a775a7SRoger Quadros
5468a775a7SRoger Quadros rate = get_sys_clk_freq();
5568a775a7SRoger Quadros
5668a775a7SRoger Quadros for (; dpll_map->rate; dpll_map++) {
5768a775a7SRoger Quadros if (rate == dpll_map->rate)
5868a775a7SRoger Quadros return &dpll_map->params;
5968a775a7SRoger Quadros }
6068a775a7SRoger Quadros
6168a775a7SRoger Quadros dev_err(phy->dev, "No DPLL configuration for %lu Hz SYS CLK\n", rate);
6268a775a7SRoger Quadros
6368a775a7SRoger Quadros return NULL;
6468a775a7SRoger Quadros }
6568a775a7SRoger Quadros
omap_usb_dpll_relock(struct omap_usb3_phy * phy_regs)66ba55453cSDan Murphy static void omap_usb_dpll_relock(struct omap_usb3_phy *phy_regs)
67ba55453cSDan Murphy {
68ba55453cSDan Murphy u32 val;
69ba55453cSDan Murphy
70ba55453cSDan Murphy writel(SET_PLL_GO, &phy_regs->pll_go);
71ba55453cSDan Murphy do {
72ba55453cSDan Murphy val = readl(&phy_regs->pll_status);
73ba55453cSDan Murphy if (val & PLL_LOCK)
74ba55453cSDan Murphy break;
75ba55453cSDan Murphy } while (1);
76ba55453cSDan Murphy }
77ba55453cSDan Murphy
omap_usb_dpll_lock(struct omap_usb3_phy * phy_regs)78ba55453cSDan Murphy static void omap_usb_dpll_lock(struct omap_usb3_phy *phy_regs)
79ba55453cSDan Murphy {
8068a775a7SRoger Quadros struct usb3_dpll_params *dpll_params;
81ba55453cSDan Murphy u32 val;
82ba55453cSDan Murphy
8368a775a7SRoger Quadros dpll_params = omap_usb3_get_dpll_params();
8468a775a7SRoger Quadros if (!dpll_params)
8568a775a7SRoger Quadros return;
8668a775a7SRoger Quadros
87ba55453cSDan Murphy val = readl(&phy_regs->pll_config_1);
88ba55453cSDan Murphy val &= ~PLL_REGN_MASK;
8968a775a7SRoger Quadros val |= dpll_params->n << PLL_REGN_SHIFT;
90ba55453cSDan Murphy writel(val, &phy_regs->pll_config_1);
91ba55453cSDan Murphy
92ba55453cSDan Murphy val = readl(&phy_regs->pll_config_2);
93ba55453cSDan Murphy val &= ~PLL_SELFREQDCO_MASK;
9468a775a7SRoger Quadros val |= dpll_params->freq << PLL_SELFREQDCO_SHIFT;
95ba55453cSDan Murphy writel(val, &phy_regs->pll_config_2);
96ba55453cSDan Murphy
97ba55453cSDan Murphy val = readl(&phy_regs->pll_config_1);
98ba55453cSDan Murphy val &= ~PLL_REGM_MASK;
9968a775a7SRoger Quadros val |= dpll_params->m << PLL_REGM_SHIFT;
100ba55453cSDan Murphy writel(val, &phy_regs->pll_config_1);
101ba55453cSDan Murphy
102ba55453cSDan Murphy val = readl(&phy_regs->pll_config_4);
103ba55453cSDan Murphy val &= ~PLL_REGM_F_MASK;
10468a775a7SRoger Quadros val |= dpll_params->mf << PLL_REGM_F_SHIFT;
105ba55453cSDan Murphy writel(val, &phy_regs->pll_config_4);
106ba55453cSDan Murphy
107ba55453cSDan Murphy val = readl(&phy_regs->pll_config_3);
108ba55453cSDan Murphy val &= ~PLL_SD_MASK;
10968a775a7SRoger Quadros val |= dpll_params->sd << PLL_SD_SHIFT;
110ba55453cSDan Murphy writel(val, &phy_regs->pll_config_3);
111ba55453cSDan Murphy
112ba55453cSDan Murphy omap_usb_dpll_relock(phy_regs);
113ba55453cSDan Murphy }
114ba55453cSDan Murphy
usb3_phy_partial_powerup(struct omap_usb3_phy * phy_regs)115ba55453cSDan Murphy static void usb3_phy_partial_powerup(struct omap_usb3_phy *phy_regs)
116ba55453cSDan Murphy {
117ba55453cSDan Murphy u32 rate = get_sys_clk_freq()/1000000;
118ba55453cSDan Murphy u32 val;
119ba55453cSDan Murphy
120ba55453cSDan Murphy val = readl((*ctrl)->control_phy_power_usb);
121ba55453cSDan Murphy val &= ~(USB3_PWRCTL_CLK_CMD_MASK | USB3_PWRCTL_CLK_FREQ_MASK);
122ba55453cSDan Murphy val |= (USB3_PHY_PARTIAL_RX_POWERON | USB3_PHY_TX_RX_POWERON);
123ba55453cSDan Murphy val |= rate << USB3_PWRCTL_CLK_FREQ_SHIFT;
124ba55453cSDan Murphy
125ba55453cSDan Murphy writel(val, (*ctrl)->control_phy_power_usb);
126ba55453cSDan Murphy }
127ba55453cSDan Murphy
usb_phy_power(int on)128834e91afSDan Murphy void usb_phy_power(int on)
129ba55453cSDan Murphy {
130ba55453cSDan Murphy u32 val;
131ba55453cSDan Murphy
132ba55453cSDan Murphy val = readl((*ctrl)->control_phy_power_usb);
133ba55453cSDan Murphy if (on) {
134ba55453cSDan Murphy val &= ~USB3_PWRCTL_CLK_CMD_MASK;
135ba55453cSDan Murphy val |= USB3_PHY_TX_RX_POWERON;
136ba55453cSDan Murphy } else {
137ba55453cSDan Murphy val &= (~USB3_PWRCTL_CLK_CMD_MASK & ~USB3_PHY_TX_RX_POWERON);
138ba55453cSDan Murphy }
139ba55453cSDan Murphy
140ba55453cSDan Murphy writel(val, (*ctrl)->control_phy_power_usb);
141ba55453cSDan Murphy }
142ba55453cSDan Murphy
omap_usb3_phy_init(struct omap_usb3_phy * phy_regs)143ba55453cSDan Murphy void omap_usb3_phy_init(struct omap_usb3_phy *phy_regs)
144ba55453cSDan Murphy {
145ba55453cSDan Murphy omap_usb_dpll_lock(phy_regs);
146ba55453cSDan Murphy usb3_phy_partial_powerup(phy_regs);
147ba55453cSDan Murphy /*
148ba55453cSDan Murphy * Give enough time for the PHY to partially power-up before
149ba55453cSDan Murphy * powering it up completely. delay value suggested by the HW
150ba55453cSDan Murphy * team.
151ba55453cSDan Murphy */
152ba55453cSDan Murphy mdelay(100);
153ba55453cSDan Murphy }
154ba55453cSDan Murphy
omap_enable_usb3_phy(struct omap_xhci * omap)155834e91afSDan Murphy static void omap_enable_usb3_phy(struct omap_xhci *omap)
156ba55453cSDan Murphy {
157ba55453cSDan Murphy u32 val;
158ba55453cSDan Murphy
159ba55453cSDan Murphy val = (USBOTGSS_DMADISABLE |
160ba55453cSDan Murphy USBOTGSS_STANDBYMODE_SMRT_WKUP |
161ba55453cSDan Murphy USBOTGSS_IDLEMODE_NOIDLE);
162ba55453cSDan Murphy writel(val, &omap->otg_wrapper->sysconfig);
163ba55453cSDan Murphy
164ba55453cSDan Murphy /* Clear the utmi OTG status */
165ba55453cSDan Murphy val = readl(&omap->otg_wrapper->utmi_otg_status);
166ba55453cSDan Murphy writel(val, &omap->otg_wrapper->utmi_otg_status);
167ba55453cSDan Murphy
168ba55453cSDan Murphy /* Enable interrupts */
169ba55453cSDan Murphy writel(USBOTGSS_COREIRQ_EN, &omap->otg_wrapper->irqenable_set_0);
170ba55453cSDan Murphy val = (USBOTGSS_IRQ_SET_1_IDPULLUP_FALL_EN |
171ba55453cSDan Murphy USBOTGSS_IRQ_SET_1_DISCHRGVBUS_FALL_EN |
172ba55453cSDan Murphy USBOTGSS_IRQ_SET_1_CHRGVBUS_FALL_EN |
173ba55453cSDan Murphy USBOTGSS_IRQ_SET_1_DRVVBUS_FALL_EN |
174ba55453cSDan Murphy USBOTGSS_IRQ_SET_1_IDPULLUP_RISE_EN |
175ba55453cSDan Murphy USBOTGSS_IRQ_SET_1_DISCHRGVBUS_RISE_EN |
176ba55453cSDan Murphy USBOTGSS_IRQ_SET_1_CHRGVBUS_RISE_EN |
177ba55453cSDan Murphy USBOTGSS_IRQ_SET_1_DRVVBUS_RISE_EN |
178ba55453cSDan Murphy USBOTGSS_IRQ_SET_1_OEVT_EN);
179ba55453cSDan Murphy writel(val, &omap->otg_wrapper->irqenable_set_1);
180ba55453cSDan Murphy
181ba55453cSDan Murphy /* Clear the IRQ status */
182ba55453cSDan Murphy val = readl(&omap->otg_wrapper->irqstatus_1);
183ba55453cSDan Murphy writel(val, &omap->otg_wrapper->irqstatus_1);
184ba55453cSDan Murphy val = readl(&omap->otg_wrapper->irqstatus_0);
185ba55453cSDan Murphy writel(val, &omap->otg_wrapper->irqstatus_0);
186ba55453cSDan Murphy };
187834e91afSDan Murphy #endif /* CONFIG_OMAP_USB3PHY1_HOST */
188834e91afSDan Murphy
189834e91afSDan Murphy #ifdef CONFIG_OMAP_USB2PHY2_HOST
omap_enable_usb2_phy2(struct omap_xhci * omap)190834e91afSDan Murphy static void omap_enable_usb2_phy2(struct omap_xhci *omap)
191834e91afSDan Murphy {
192834e91afSDan Murphy u32 reg, val;
193834e91afSDan Murphy
194834e91afSDan Murphy val = (~USB2PHY_AUTORESUME_EN & USB2PHY_DISCHGDET);
195834e91afSDan Murphy writel(val, (*ctrl)->control_srcomp_north_side);
196834e91afSDan Murphy
197834e91afSDan Murphy setbits_le32((*prcm)->cm_coreaon_usb_phy2_core_clkctrl,
198834e91afSDan Murphy USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K);
199834e91afSDan Murphy
200834e91afSDan Murphy setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl,
201834e91afSDan Murphy (USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K |
202834e91afSDan Murphy OTG_SS_CLKCTRL_MODULEMODE_HW));
203834e91afSDan Murphy
204834e91afSDan Murphy /* This is an undocumented Reserved register */
205834e91afSDan Murphy reg = 0x4a0086c0;
206834e91afSDan Murphy val = readl(reg);
207834e91afSDan Murphy val |= 0x100;
208834e91afSDan Murphy setbits_le32(reg, val);
209834e91afSDan Murphy }
210834e91afSDan Murphy
usb_phy_power(int on)211834e91afSDan Murphy void usb_phy_power(int on)
212834e91afSDan Murphy {
213834e91afSDan Murphy return;
214834e91afSDan Murphy }
215834e91afSDan Murphy #endif /* CONFIG_OMAP_USB2PHY2_HOST */
216ba55453cSDan Murphy
2173d799c7fSDan Murphy #ifdef CONFIG_AM437X_USB2PHY2_HOST
am437x_enable_usb2_phy2(struct omap_xhci * omap)2183d799c7fSDan Murphy static void am437x_enable_usb2_phy2(struct omap_xhci *omap)
2193d799c7fSDan Murphy {
2203d799c7fSDan Murphy const u32 usb_otg_ss_clk_val = (USBOTGSSX_CLKCTRL_MODULE_EN |
2213d799c7fSDan Murphy USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960);
2223d799c7fSDan Murphy
2233d799c7fSDan Murphy writel(usb_otg_ss_clk_val, PRM_PER_USB_OTG_SS0_CLKCTRL);
2243d799c7fSDan Murphy writel(usb_otg_ss_clk_val, PRM_PER_USB_OTG_SS1_CLKCTRL);
2253d799c7fSDan Murphy
2263d799c7fSDan Murphy writel(USBPHYOCPSCP_MODULE_EN, PRM_PER_USBPHYOCP2SCP0_CLKCTRL);
2273d799c7fSDan Murphy writel(USBPHYOCPSCP_MODULE_EN, PRM_PER_USBPHYOCP2SCP1_CLKCTRL);
2283d799c7fSDan Murphy }
2293d799c7fSDan Murphy
usb_phy_power(int on)2303d799c7fSDan Murphy void usb_phy_power(int on)
2313d799c7fSDan Murphy {
2325ba95541SFelipe Balbi u32 val;
2335ba95541SFelipe Balbi
2345ba95541SFelipe Balbi /* USB1_CTRL */
2355ba95541SFelipe Balbi val = readl(USB1_CTRL);
2365ba95541SFelipe Balbi if (on) {
2375ba95541SFelipe Balbi /*
2385ba95541SFelipe Balbi * these bits are re-used on AM437x to power up/down the USB
2395ba95541SFelipe Balbi * CM and OTG PHYs, if we don't toggle them, USB will not be
2405ba95541SFelipe Balbi * functional on newer silicon revisions
2415ba95541SFelipe Balbi */
2425ba95541SFelipe Balbi val &= ~(USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN);
2435ba95541SFelipe Balbi } else {
2445ba95541SFelipe Balbi val |= USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN;
2455ba95541SFelipe Balbi }
2465ba95541SFelipe Balbi
2475ba95541SFelipe Balbi writel(val, USB1_CTRL);
2483d799c7fSDan Murphy }
2493d799c7fSDan Murphy #endif /* CONFIG_AM437X_USB2PHY2_HOST */
2503d799c7fSDan Murphy
omap_enable_phy(struct omap_xhci * omap)251834e91afSDan Murphy void omap_enable_phy(struct omap_xhci *omap)
252834e91afSDan Murphy {
253834e91afSDan Murphy #ifdef CONFIG_OMAP_USB2PHY2_HOST
254834e91afSDan Murphy omap_enable_usb2_phy2(omap);
255834e91afSDan Murphy #endif
256834e91afSDan Murphy
2573d799c7fSDan Murphy #ifdef CONFIG_AM437X_USB2PHY2_HOST
2583d799c7fSDan Murphy am437x_enable_usb2_phy2(omap);
2593d799c7fSDan Murphy #endif
2603d799c7fSDan Murphy
261834e91afSDan Murphy #ifdef CONFIG_OMAP_USB3PHY1_HOST
262834e91afSDan Murphy omap_enable_usb3_phy(omap);
263834e91afSDan Murphy omap_usb3_phy_init(omap->usb3_phy);
264834e91afSDan Murphy #endif
265834e91afSDan Murphy }
266