| /openbmc/linux/drivers/crypto/intel/qat/qat_common/ |
| H A D | adf_ctl_drv.c | 360 dev_info.banks_per_accel = hw_data->num_banks in adf_ctl_ioctl_get_status()
|
| /openbmc/linux/drivers/pinctrl/meson/ |
| H A D | pinctrl-meson-axg.c | 1052 .num_banks = ARRAY_SIZE(meson_axg_periphs_banks),
1066 .num_banks = ARRAY_SIZE(meson_axg_aobus_banks),
|
| H A D | pinctrl-meson8.c | 1091 .num_banks = ARRAY_SIZE(meson8_cbus_banks),
1104 .num_banks = ARRAY_SIZE(meson8_aobus_banks),
|
| H A D | pinctrl-meson-g12a.c | 1387 .num_banks = ARRAY_SIZE(meson_g12a_periphs_banks),
1401 .num_banks = ARRAY_SIZE(meson_g12a_aobus_banks),
|
| H A D | pinctrl-meson.c | 77 for (i = 0; i < pc->data->num_banks; i++) { in meson_get_bank()
|
| H A D | pinctrl-meson-a1.c | 915 .num_banks = ARRAY_SIZE(meson_a1_periphs_banks),
|
| H A D | pinctrl-amlogic-c3.c | 1082 .num_banks = ARRAY_SIZE(c3_periphs_banks),
|
| H A D | pinctrl-meson-s4.c | 1209 .num_banks = ARRAY_SIZE(meson_s4_periphs_banks),
|
| /openbmc/linux/drivers/crypto/intel/qat/qat_4xxx/ |
| H A D | adf_4xxx_hw_data.c | 511 hw_data->num_banks = ADF_4XXX_ETR_MAX_BANKS; in adf_init_hw_data_4xxx()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| H A D | dcn301_fpu.c | 201 .num_banks = 8,
|
| /openbmc/linux/drivers/gpu/drm/radeon/ |
| H A D | atombios_crtc.c | 1270 unsigned index, num_banks; in dce4_crtc_do_set_base() local
1290 num_banks = (rdev->config.cik.macrotile_mode_array[index] >> 6) & 0x3; in dce4_crtc_do_set_base()
1305 num_banks = (rdev->config.si.tile_mode_array[index] >> 20) & 0x3; in dce4_crtc_do_set_base()
1308 fb_format |= EVERGREEN_GRPH_NUM_BANKS(num_banks); in dce4_crtc_do_set_base()
|
| /openbmc/linux/drivers/clk/ |
| H A D | clk-versaclock7.c | 112 const unsigned int num_banks; member
1256 .num_banks = 6,
|
| /openbmc/u-boot/arch/arm/mach-omap2/ |
| H A D | emif-common.c | 656 config_reg |= addressing->num_banks << EMIF_REG_IBANK_SHIFT; in get_sdram_config_reg()
690 if (addressing->num_banks == BANKS8) in get_sdram_tim_1_reg()
|
| /openbmc/linux/include/uapi/linux/ |
| H A D | kfd_ioctl.h | 375 __u32 num_banks; /* from KFD */ member
|
| /openbmc/u-boot/arch/arm/include/asm/ |
| H A D | emif.h | 1132 u8 num_banks; member
|
| /openbmc/linux/drivers/net/wireless/ath/ath10k/ |
| H A D | htt.h | 1498 u8 num_banks; member
1507 u8 num_banks; member
|
| H A D | htt_tx.c | 711 cfg->num_banks = 1; in ath10k_htt_send_frag_desc_bank_cfg_32()
773 cfg->num_banks = 1; in ath10k_htt_send_frag_desc_bank_cfg_64()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 317 .num_banks = 8,
428 .num_banks = 8,
539 .num_banks = 8,
753 .num_banks = 8,
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| H A D | dce110_mem_input_v.c | 172 set_reg_field_value(value, info->gfx8.num_banks, in program_tiling()
|
| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v9_4_2.c | 51 uint32_t num_banks; member
1613 blk->num_banks * blk->num_ways * blk->num_mem_blocks; in gfx_v9_4_2_query_utc_edc_count()
|
| H A D | dce_v8_0.c | 1908 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v8_0_crtc_do_set_base() local
1914 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in dce_v8_0_crtc_do_set_base()
1916 fb_format |= (num_banks << GRPH_CONTROL__GRPH_NUM_BANKS__SHIFT); in dce_v8_0_crtc_do_set_base()
|
| H A D | dce_v6_0.c | 1939 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v6_0_crtc_do_set_base() local
1945 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in dce_v6_0_crtc_do_set_base()
1947 fb_format |= GRPH_NUM_BANKS(num_banks); in dce_v6_0_crtc_do_set_base()
|
| H A D | dce_v10_0.c | 1983 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v10_0_crtc_do_set_base() local
1989 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in dce_v10_0_crtc_do_set_base()
1991 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_NUM_BANKS, num_banks); in dce_v10_0_crtc_do_set_base()
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| H A D | dcn201_resource.c | 225 .num_banks = 8,
|
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | dcn30_fpu.c | 164 .num_banks = 8,
|