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Searched refs:mmu (Results 151 – 175 of 393) sorted by relevance

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/openbmc/linux/arch/arm64/boot/dts/amd/
H A Damd-seattle-xgbe-b.dtsi89 compatible = "arm,mmu-401";
102 compatible = "arm,mmu-401";
/openbmc/u-boot/arch/arm/mach-exynos/
H A DMakefile8 obj-$(CONFIG_ARM64) += mmu-arm64.o
/openbmc/linux/arch/mips/kvm/
H A DMakefile15 kvm-y += mmu.o
/openbmc/qemu/target/openrisc/
H A Dmeson.build21 'mmu.c',
/openbmc/linux/drivers/gpu/drm/panfrost/
H A Dpanfrost_job.h20 struct panfrost_mmu *mmu; member
/openbmc/linux/drivers/gpu/drm/msm/
H A Dmsm_drv.c271 struct msm_mmu *mmu; in msm_kms_init_aspace() local
285 mmu = msm_iommu_new(iommu_dev, 0); in msm_kms_init_aspace()
286 if (IS_ERR(mmu)) in msm_kms_init_aspace()
287 return ERR_CAST(mmu); in msm_kms_init_aspace()
289 if (!mmu) { in msm_kms_init_aspace()
294 aspace = msm_gem_address_space_create(mmu, "mdp_kms", in msm_kms_init_aspace()
298 mmu->funcs->destroy(mmu); in msm_kms_init_aspace()
/openbmc/u-boot/arch/arm/dts/
H A Dr8a77995.dtsi444 ipmmu_ds0: mmu@e6740000 {
452 ipmmu_ds1: mmu@e7740000 {
460 ipmmu_hc: mmu@e6570000 {
468 ipmmu_mm: mmu@e67b0000 {
477 ipmmu_mp: mmu@ec670000 {
485 ipmmu_pv0: mmu@fd800000 {
493 ipmmu_rt: mmu@ffc80000 {
501 ipmmu_vc0: mmu@fe6b0000 {
509 ipmmu_vi0: mmu@febd0000 {
517 ipmmu_vp0: mmu@fe990000 {
/openbmc/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_bo.c206 struct nvif_mmu *mmu = &cli->mmu; in nouveau_bo_alloc() local
240 if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) { in nouveau_bo_alloc()
245 nvbo->comp = mmu->kind[nvbo->kind] != nvbo->kind; in nouveau_bo_alloc()
249 if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) { in nouveau_bo_alloc()
294 if (mmu->object.oclass >= NVIF_CLASS_MMU_GF100) in nouveau_bo_alloc()
295 nvbo->kind = mmu->kind[nvbo->kind]; in nouveau_bo_alloc()
1158 struct nvif_mmu *mmu = &drm->client.mmu; in nouveau_ttm_io_mem_reserve() local
1191 mmu->type[drm->ttm.type_vram].type & NVIF_MEM_UNCACHED) in nouveau_ttm_io_mem_reserve()
/openbmc/linux/arch/x86/hyperv/
H A Dmmu.c242 pv_ops.mmu.flush_tlb_multi = hyperv_flush_tlb_multi; in hyperv_setup_mmu_ops()
243 pv_ops.mmu.tlb_remove_table = tlb_remove_table; in hyperv_setup_mmu_ops()
/openbmc/linux/Documentation/devicetree/bindings/nios2/
H A Dnios2.txt27 - altr,has-mmu: Specifies CPU support MMU support, should be 1.
61 altr,has-mmu = <1>;
/openbmc/linux/drivers/accel/habanalabs/common/
H A DMakefile3 include $(src)/common/mmu/Makefile
/openbmc/linux/arch/riscv/boot/dts/sifive/
H A Dfu740-c000.dtsi54 mmu-type = "riscv,sv39";
78 mmu-type = "riscv,sv39";
102 mmu-type = "riscv,sv39";
126 mmu-type = "riscv,sv39";
/openbmc/linux/arch/x86/xen/
H A Dmmu_hvm.c65 pv_ops.mmu.exit_mmap = xen_hvm_exit_mmap; in xen_hvm_init_mmu_ops()
/openbmc/linux/arch/arm64/mm/
H A DMakefile4 ioremap.o mmap.o pgd.o mmu.o \
/openbmc/linux/Documentation/devicetree/bindings/riscv/
H A Dcpus.yaml62 mmu-type:
178 mmu-type = "riscv,sv39";
201 mmu-type = "riscv,sv48";
/openbmc/linux/drivers/gpu/drm/gma500/
H A DMakefile23 mmu.o \
/openbmc/linux/Documentation/virt/kvm/
H A Dlocking.rst60 the mmu-lock on x86. Currently, the page fault can be fast in one of the
75 - MMU-writable means the gfn is writable in the guest's mmu and it is not
189 if it can be updated out of mmu-lock [see spte_has_volatile_bits()]; it means
198 As mentioned before, the spte can be updated to writable out of mmu-lock on
203 Since the spte is "volatile" if it can be updated out of mmu-lock, we always
257 :Comment: it is a spinlock since it is used in mmu notifier.
/openbmc/linux/arch/microblaze/boot/dts/
H A Dsystem.dts89 xlnx,mmu-dtlb-size = <0x4>;
90 xlnx,mmu-itlb-size = <0x2>;
91 xlnx,mmu-tlb-access = <0x3>;
92 xlnx,mmu-zones = <0x10>;
113 xlnx,use-mmu = <0x3>;
/openbmc/linux/drivers/gpu/drm/nouveau/dispnv50/
H A Dcrc.c500 nv50_crc_ctx_init(struct nv50_head *head, struct nvif_mmu *mmu, in nv50_crc_ctx_init() argument
506 ret = nvif_mem_ctor_map(mmu, "kmsCrcNtfy", NVIF_MEM_VRAM, len, &ctx->mem); in nv50_crc_ctx_init()
546 struct nvif_mmu *mmu = &nouveau_drm(dev)->client.mmu; in nv50_crc_set_source() local
573 ret = nv50_crc_ctx_init(head, mmu, &crc->ctx[i], in nv50_crc_set_source()
/openbmc/linux/arch/riscv/boot/dts/thead/
H A Dth1520.dtsi31 mmu-type = "riscv,sv39";
52 mmu-type = "riscv,sv39";
73 mmu-type = "riscv,sv39";
94 mmu-type = "riscv,sv39";
/openbmc/linux/arch/riscv/kvm/
H A DMakefile16 kvm-y += mmu.o
/openbmc/linux/drivers/gpu/drm/nouveau/nvif/
H A DKbuild12 nvif-y += nvif/mmu.o
/openbmc/u-boot/arch/arm/mach-tegra/
H A DMakefile25 obj-$(CONFIG_ARM64) += arm64-mmu.o
/openbmc/qemu/target/microblaze/
H A Dmmu.h92 void mmu_init(MicroBlazeMMU *mmu);
/openbmc/linux/arch/arm64/boot/dts/arm/
H A Djuno-base.dtsi37 compatible = "arm,mmu-400", "arm,smmu-v1";
49 compatible = "arm,mmu-401", "arm,smmu-v1";
60 compatible = "arm,mmu-401", "arm,smmu-v1";
660 interrupt-names = "job", "mmu", "gpu";
806 compatible = "arm,mmu-401", "arm,smmu-v1";
816 compatible = "arm,mmu-401", "arm,smmu-v1";
825 compatible = "arm,mmu-401", "arm,smmu-v1";
834 compatible = "arm,mmu-401", "arm,smmu-v1";

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