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/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/lib/
H A Dmpfs.h53 int ix = MLX5_L2_ADDR_HASH(mac); \
57 hlist_for_each_entry(ptr, &(hash)[ix], node.hlist) \
68 int ix = MLX5_L2_ADDR_HASH(mac); \
74 hlist_add_head(&ptr->node.hlist, &(hash)[ix]);\
H A Dmpfs.c79 static int alloc_l2table_index(struct mlx5_mpfs *l2table, u32 *ix) in alloc_l2table_index() argument
83 *ix = find_first_zero_bit(l2table->bitmap, l2table->size); in alloc_l2table_index()
84 if (*ix >= l2table->size) in alloc_l2table_index()
87 __set_bit(*ix, l2table->bitmap); in alloc_l2table_index()
92 static void free_l2table_index(struct mlx5_mpfs *l2table, u32 ix) in free_l2table_index() argument
94 __clear_bit(ix, l2table->bitmap); in free_l2table_index()
/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/
H A Dpool.h10 struct mlx5e_xsk *xsk, u16 ix) in mlx5e_xsk_get_pool() argument
15 if (unlikely(ix >= params->num_channels)) in mlx5e_xsk_get_pool()
18 return xsk->pools[ix]; in mlx5e_xsk_get_pool()
H A Drx.h11 int mlx5e_xsk_alloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix);
12 int mlx5e_xsk_alloc_rx_wqes_batched(struct mlx5e_rq *rq, u16 ix, int wqe_bulk);
13 int mlx5e_xsk_alloc_rx_wqes(struct mlx5e_rq *rq, u16 ix, int wqe_bulk);
H A Drx.c19 int mlx5e_xsk_alloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix) in mlx5e_xsk_alloc_rx_mpwqe() argument
21 struct mlx5e_mpw_info *wi = mlx5e_get_mpw_info(rq, ix); in mlx5e_xsk_alloc_rx_mpwqe()
130 offset = ix * rq->mpwqe.mtts_per_wqe; in mlx5e_xsk_alloc_rx_mpwqe()
160 int mlx5e_xsk_alloc_rx_wqes_batched(struct mlx5e_rq *rq, u16 ix, int wqe_bulk) in mlx5e_xsk_alloc_rx_wqes_batched() argument
171 contig = mlx5_wq_cyc_get_size(wq) - ix; in mlx5e_xsk_alloc_rx_wqes_batched()
173 alloc = xsk_buff_alloc_batch(rq->xsk_pool, buffs + ix, wqe_bulk); in mlx5e_xsk_alloc_rx_wqes_batched()
175 alloc = xsk_buff_alloc_batch(rq->xsk_pool, buffs + ix, contig); in mlx5e_xsk_alloc_rx_wqes_batched()
181 int j = mlx5_wq_cyc_ctr2ix(wq, ix + i); in mlx5e_xsk_alloc_rx_wqes_batched()
198 int mlx5e_xsk_alloc_rx_wqes(struct mlx5e_rq *rq, u16 ix, int wqe_bulk) in mlx5e_xsk_alloc_rx_wqes() argument
204 int j = mlx5_wq_cyc_ctr2ix(wq, ix + i); in mlx5e_xsk_alloc_rx_wqes()
H A Dsetup.c78 rq->ix = c->ix; in mlx5e_init_xsk_rq()
84 rq->stats = &c->priv->channel_stats[c->ix]->xskrq; in mlx5e_init_xsk_rq()
86 rq_xdp_ix = c->ix; in mlx5e_init_xsk_rq()
/openbmc/linux/drivers/input/misc/
H A Dyealink.c282 int ix, len; in yealink_set_ringtone() local
298 ix = 0; in yealink_set_ringtone()
299 while (size != ix) { in yealink_set_ringtone()
300 len = size - ix; in yealink_set_ringtone()
307 ix += len; in yealink_set_ringtone()
317 int i, ix, len; in yealink_do_idle_tasks() local
319 ix = yld->stat_ix; in yealink_do_idle_tasks()
349 yld->copy.b[ix] = val; in yealink_do_idle_tasks()
352 switch(ix) { in yealink_do_idle_tasks()
385 ix++; in yealink_do_idle_tasks()
[all …]
/openbmc/linux/drivers/net/wireless/marvell/mwifiex/
H A Dutil.c711 int ix; in mwifiex_hist_data_reset() local
715 for (ix = 0; ix < MWIFIEX_MAX_AC_RX_RATES; ix++) in mwifiex_hist_data_reset()
716 atomic_set(&phist_data->rx_rate[ix], 0); in mwifiex_hist_data_reset()
717 for (ix = 0; ix < MWIFIEX_MAX_SNR; ix++) in mwifiex_hist_data_reset()
718 atomic_set(&phist_data->snr[ix], 0); in mwifiex_hist_data_reset()
719 for (ix = 0; ix < MWIFIEX_MAX_NOISE_FLR; ix++) in mwifiex_hist_data_reset()
720 atomic_set(&phist_data->noise_flr[ix], 0); in mwifiex_hist_data_reset()
721 for (ix = 0; ix < MWIFIEX_MAX_SIG_STRENGTH; ix++) in mwifiex_hist_data_reset()
722 atomic_set(&phist_data->sig_str[ix], 0); in mwifiex_hist_data_reset()
/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/fpga/
H A Dconn.c103 unsigned int ix; in mlx5_fpga_conn_post_recv() local
122 conn->qp.rq.bufs[ix] = buf; in mlx5_fpga_conn_post_recv()
146 unsigned int ix, sgi; in mlx5_fpga_conn_post_send() local
171 conn->qp.sq.bufs[ix] = buf; in mlx5_fpga_conn_post_send()
254 int ix, err; in mlx5_fpga_conn_rq_cqe() local
257 buf = conn->qp.rq.bufs[ix]; in mlx5_fpga_conn_rq_cqe()
295 int ix; in mlx5_fpga_conn_sq_cqe() local
607 int ix; in mlx5_fpga_conn_free_recv_bufs() local
609 for (ix = 0; ix < conn->qp.rq.size; ix++) { in mlx5_fpga_conn_free_recv_bufs()
621 int ix; in mlx5_fpga_conn_flush_send_bufs() local
[all …]
/openbmc/openbmc-test-automation/lib/
H A Dgen_cmd.py226 ix = 1
228 while ix < len(command_string_list):
229 if command_string_list[ix].startswith("--"):
230 key, value = command_string_list[ix].split("=")
232 elif command_string_list[ix].startswith("-"):
233 key = command_string_list[ix].lstrip("-")
234 ix += 1
236 value = command_string_list[ix]
241 value = command_string_list[ix]
248 ix += 1
H A Dgen_valid.py524 for ix in range(0, len(required_values)):
525 if required_values[ix] not in var_value:
527 display_required_values[ix] = (
528 str(display_required_values[ix]) + "*"
553 for ix in range(0, len(var_value)):
554 if var_value[ix] in invalid_values:
556 display_var_value[ix] = str(var_value[ix]) + "*"
571 for ix in range(0, len(var_value)):
572 if var_value[ix] not in valid_values:
574 display_var_value[ix] = str(var_value[ix]) + "*"
H A Dcmd.tcl109 for {set ix [llength $args]} {$ix < $min_args} {incr ix} {
H A Dgen_print.py83 def set_last_seconds_ix(ix): argument
91 last_seconds_ix = ix
416 lvalues[ix] = lvalue
417 ix += 1
1181 ix = 0
1193 ix += 1
1211 ix += 1
1227 ix += 1
1455 ix = 0
1458 ix += 1
[all …]
H A Dtools.exp116 set ix 0
129 append cmd_buf " ${flag} {$pattern} {set expect_result $ix}\n"
130 incr ix
/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/en/
H A Dfs_tt_redirect.c148 int ix = 0; in fs_udp_create_groups() local
178 MLX5_SET_CFG(in, start_flow_index, ix); in fs_udp_create_groups()
179 ix += MLX5E_FS_UDP_GROUP1_SIZE; in fs_udp_create_groups()
180 MLX5_SET_CFG(in, end_flow_index, ix - 1); in fs_udp_create_groups()
188 MLX5_SET_CFG(in, start_flow_index, ix); in fs_udp_create_groups()
189 ix += MLX5E_FS_UDP_GROUP2_SIZE; in fs_udp_create_groups()
430 int ix = 0; in fs_any_create_groups() local
449 MLX5_SET_CFG(in, start_flow_index, ix); in fs_any_create_groups()
450 ix += MLX5E_FS_ANY_GROUP1_SIZE; in fs_any_create_groups()
459 MLX5_SET_CFG(in, start_flow_index, ix); in fs_any_create_groups()
[all …]
H A Dqos.c59 int ix; in mlx5e_get_qos_sq() local
61 ix = qid % params->num_channels; in mlx5e_get_qos_sq()
63 c = priv->channels.c[ix]; in mlx5e_get_qos_sq()
76 int txq_ix, ix, qid, err = 0; in mlx5e_open_qos_sq() local
111 ix = node_qid % params->num_channels; in mlx5e_open_qos_sq()
113 c = chs->c[ix]; in mlx5e_open_qos_sq()
209 int ix; in mlx5e_close_qos_sq() local
213 ix = qid % params->num_channels; in mlx5e_close_qos_sq()
215 c = priv->channels.c[ix]; in mlx5e_close_qos_sq()
332 u16 qid = params->num_channels * i + c->ix; in mlx5e_qos_deactivate_queues()
/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Den_fs.c117 int ix = mlx5e_hash_l2(addr); in mlx5e_add_l2_to_hash() local
1017 int ix = 0; in mlx5e_create_l2_table_groups() local
1039 ix += MLX5E_L2_GROUP1_SIZE; in mlx5e_create_l2_table_groups()
1050 ix += MLX5E_L2_GROUP2_SIZE; in mlx5e_create_l2_table_groups()
1060 ix += MLX5E_L2_GROUP_TRAP_SIZE; in mlx5e_create_l2_table_groups()
1134 int ix = 0; in __mlx5e_create_vlan_table_groups() local
1142 ix += MLX5E_VLAN_GROUP0_SIZE; in __mlx5e_create_vlan_table_groups()
1154 ix += MLX5E_VLAN_GROUP1_SIZE; in __mlx5e_create_vlan_table_groups()
1165 ix += MLX5E_VLAN_GROUP2_SIZE; in __mlx5e_create_vlan_table_groups()
1176 ix += MLX5E_VLAN_GROUP3_SIZE; in __mlx5e_create_vlan_table_groups()
[all …]
/openbmc/linux/drivers/gpu/drm/radeon/
H A Dtrinity_dpm.c545 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_divider_value() local
572 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_ds_dividers() local
584 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_ss_dividers() local
597 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_vid() local
614 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_allos_gnb_slow() local
626 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_force_nbp_state() local
638 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_display_wm() local
650 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_vce_wm() local
662 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_at() local
667 WREG32_SMC(SMU_SCLK_DPM_STATE_0_AT + ix, value); in trinity_set_at()
[all …]
/openbmc/u-boot/include/
H A Dgdsys_fpga.h25 #define FPGA_SET_REG(ix, fld, val) \ argument
26 fpga_set_reg((ix), \
27 &fpga_ptr[ix]->fld, \
31 #define FPGA_GET_REG(ix, fld, val) \ argument
32 fpga_get_reg((ix), \
33 &fpga_ptr[ix]->fld, \
/openbmc/linux/drivers/s390/char/
H A Dcon3215.c176 int len, count, ix, lines; in raw3215_mk_write_req() local
201 ix = req->start; in raw3215_mk_write_req()
202 while (lines < RAW3215_MAX_NEWLINE && ix != raw->head) { in raw3215_mk_write_req()
203 if (raw->buffer[ix] == 0x15) in raw3215_mk_write_req()
205 ix = (ix + 1) & (RAW3215_BUFFER_SIZE - 1); in raw3215_mk_write_req()
207 len = ((ix - 1 - req->start) & (RAW3215_BUFFER_SIZE - 1)) + 1; in raw3215_mk_write_req()
216 ix = req->start; in raw3215_mk_write_req()
222 ccw->cda = (__u32)__pa(raw->buffer + ix); in raw3215_mk_write_req()
224 if (ix + count > RAW3215_BUFFER_SIZE) in raw3215_mk_write_req()
225 count = RAW3215_BUFFER_SIZE - ix; in raw3215_mk_write_req()
[all …]
/openbmc/linux/arch/s390/mm/
H A Dpage-states.c177 unsigned long start, end, ix; in cmma_init_nodat() local
194 for (ix = start; ix < end; ix++, page++) { in cmma_init_nodat()
/openbmc/linux/drivers/infiniband/core/
H A Dcache.c391 ix, table->data_vec[ix]->attr.gid.raw); in del_gid()
394 entry = table->data_vec[ix]; in del_gid()
400 table->data_vec[ix] = NULL; in del_gid()
553 int ix; in __ib_cache_gid_add() local
567 if (ix >= 0) in __ib_cache_gid_add()
607 int ix; in _ib_cache_gid_del() local
614 if (ix < 0) { in _ib_cache_gid_del()
619 del_gid(ib_dev, port, table, ix); in _ib_cache_gid_del()
645 int ix; in ib_cache_gid_del_all_netdev_gids() local
652 for (ix = 0; ix < table->sz; ix++) { in ib_cache_gid_del_all_netdev_gids()
[all …]
/openbmc/linux/lib/dim/
H A Dnet_dim.c65 net_dim_get_rx_moderation(u8 cq_period_mode, int ix) in net_dim_get_rx_moderation() argument
67 struct dim_cq_moder cq_moder = rx_profile[cq_period_mode][ix]; in net_dim_get_rx_moderation()
85 net_dim_get_tx_moderation(u8 cq_period_mode, int ix) in net_dim_get_tx_moderation() argument
87 struct dim_cq_moder cq_moder = tx_profile[cq_period_mode][ix]; in net_dim_get_tx_moderation()
/openbmc/linux/fs/ext4/
H A Dmigrate.c353 struct ext4_extent_idx *ix) in free_ext_idx() argument
360 block = ext4_idx_pblock(ix); in free_ext_idx()
367 ix = EXT_FIRST_INDEX(eh); in free_ext_idx()
368 for (i = 0; i < le16_to_cpu(eh->eh_entries); i++, ix++) { in free_ext_idx()
369 retval = free_ext_idx(handle, inode, ix); in free_ext_idx()
394 struct ext4_extent_idx *ix; in free_ext_block() local
400 ix = EXT_FIRST_INDEX(eh); in free_ext_block()
401 for (i = 0; i < le16_to_cpu(eh->eh_entries); i++, ix++) { in free_ext_block()
402 retval = free_ext_idx(handle, inode, ix); in free_ext_block()
/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/en_accel/
H A Dfs_tcp.c184 int ix = 0; in accel_fs_tcp_create_groups() local
235 MLX5_SET_CFG(in, start_flow_index, ix); in accel_fs_tcp_create_groups()
236 ix += MLX5E_ACCEL_FS_TCP_GROUP1_SIZE; in accel_fs_tcp_create_groups()
237 MLX5_SET_CFG(in, end_flow_index, ix - 1); in accel_fs_tcp_create_groups()
245 MLX5_SET_CFG(in, start_flow_index, ix); in accel_fs_tcp_create_groups()
246 ix += MLX5E_ACCEL_FS_TCP_GROUP2_SIZE; in accel_fs_tcp_create_groups()
247 MLX5_SET_CFG(in, end_flow_index, ix - 1); in accel_fs_tcp_create_groups()

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