| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/ |
| H A D | gk20a.c | 589 if (tdev->iommu.domain) { in gk20a_instmem_new()
590 imem->mm_mutex = &tdev->iommu.mutex; in gk20a_instmem_new()
591 imem->mm = &tdev->iommu.mm; in gk20a_instmem_new()
592 imem->domain = tdev->iommu.domain; in gk20a_instmem_new()
593 imem->iommu_pgshift = tdev->iommu.pgshift; in gk20a_instmem_new()
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| /openbmc/linux/drivers/gpu/host1x/ |
| H A D | context.c | 134 if (cd->dev.iommu->iommu_dev != dev->iommu->iommu_dev) in host1x_memory_context_alloc()
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| /openbmc/linux/drivers/gpu/drm/nouveau/include/nvkm/core/ |
| H A D | tegra.h | 28 } iommu; member
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| /openbmc/linux/drivers/iommu/ |
| H A D | dma-iommu.h | 22 dev->iommu->pci_32bit_workaround = !iommu_dma_forcedac; in iommu_dma_set_pci_32bit_workaround()
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| H A D | msm_iommu.h | 60 struct iommu_device iommu; member
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| /openbmc/linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk3288.dtsi | 987 iep_mmu: iommu@ff900800 {
993 #iommu-cells = <0>;
997 isp_mmu: iommu@ff914000 {
1003 #iommu-cells = <0>;
1057 vopb_mmu: iommu@ff930300 {
1064 #iommu-cells = <0>;
1106 vopl_mmu: iommu@ff940300 {
1113 #iommu-cells = <0>;
1280 vpu_mmu: iommu@ff9a0800 {
1286 #iommu-cells = <0>;
[all …]
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| H A D | rk322x.dtsi | 627 vpu_mmu: iommu@20020800 {
628 compatible = "rockchip,iommu";
634 #iommu-cells = <0>;
650 vdec_mmu: iommu@20030480 {
651 compatible = "rockchip,iommu";
657 #iommu-cells = <0>;
683 vop_mmu: iommu@20053f00 {
684 compatible = "rockchip,iommu";
690 #iommu-cells = <0>;
705 iep_mmu: iommu@20070800 {
[all …]
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| /openbmc/linux/arch/arm64/boot/dts/renesas/ |
| H A D | r8a774c0.dtsi | 855 #iommu-cells = <1>;
863 #iommu-cells = <1>;
866 ipmmu_hc: iommu@e6570000 {
871 #iommu-cells = <1>;
880 #iommu-cells = <1>;
888 #iommu-cells = <1>;
896 #iommu-cells = <1>;
904 #iommu-cells = <1>;
912 #iommu-cells = <1>;
920 #iommu-cells = <1>;
[all …]
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| H A D | r8a77990.dtsi | 879 #iommu-cells = <1>;
887 #iommu-cells = <1>;
895 #iommu-cells = <1>;
904 #iommu-cells = <1>;
912 #iommu-cells = <1>;
920 #iommu-cells = <1>;
928 #iommu-cells = <1>;
936 #iommu-cells = <1>;
944 #iommu-cells = <1>;
952 #iommu-cells = <1>;
[all …]
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| H A D | r8a779a0.dtsi | 2153 #iommu-cells = <1>;
2162 #iommu-cells = <1>;
2171 #iommu-cells = <1>;
2180 #iommu-cells = <1>;
2189 #iommu-cells = <1>;
2198 #iommu-cells = <1>;
2207 #iommu-cells = <1>;
2216 #iommu-cells = <1>;
2225 #iommu-cells = <1>;
2234 #iommu-cells = <1>;
[all …]
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| H A D | r8a77961.dtsi | 1059 #iommu-cells = <1>;
1067 #iommu-cells = <1>;
1075 #iommu-cells = <1>;
1083 #iommu-cells = <1>;
1092 #iommu-cells = <1>;
1100 #iommu-cells = <1>;
1108 #iommu-cells = <1>;
1116 #iommu-cells = <1>;
1124 #iommu-cells = <1>;
1132 #iommu-cells = <1>;
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | mediatek,smi-common.yaml | 14 The hardware block diagram please check bindings/iommu/mediatek,iommu.yaml
22 register which control the iommu port is at each larb's register base. But
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| /openbmc/linux/arch/sparc/mm/ |
| H A D | Makefile | 11 obj-$(CONFIG_SPARC32) += srmmu.o iommu.o io-unit.o
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| /openbmc/linux/arch/powerpc/boot/dts/fsl/ |
| H A D | b4si-post.dtsi | 65 fsl,iommu-parent = <&pamu0>;
351 iommu@20000 {
409 fsl,iommu-parent = <&pamu0>;
415 fsl,iommu-parent = <&pamu0>;
422 fsl,iommu-parent = <&pamu1>;
434 fsl,iommu-parent = <&pamu1>;
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| H A D | t2080si-post.dtsi | 40 fsl,iommu-parent = <&pamu1>;
46 fsl,iommu-parent = <&pamu1>;
|
| /openbmc/qemu/include/hw/pci-host/ |
| H A D | sabre.h | 37 IOMMUState *iommu; member
|
| /openbmc/linux/Documentation/arch/x86/ |
| H A D | index.rst | 26 iommu
|
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | r8a77995.dtsi | 449 #iommu-cells = <1>;
457 #iommu-cells = <1>;
465 #iommu-cells = <1>;
474 #iommu-cells = <1>;
482 #iommu-cells = <1>;
490 #iommu-cells = <1>;
498 #iommu-cells = <1>;
506 #iommu-cells = <1>;
514 #iommu-cells = <1>;
522 #iommu-cells = <1>;
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| /openbmc/linux/Documentation/devicetree/bindings/media/ |
| H A D | samsung,s5p-mfc.yaml | 50 iommu-names:
183 iommu-names = "left", "right";
|
| /openbmc/linux/Documentation/devicetree/bindings/display/samsung/ |
| H A D | samsung,exynos5433-decon.yaml | 63 iommu-names:
132 iommu-names = "m0", "m1";
|
| /openbmc/linux/arch/arm/mm/ |
| H A D | dma-mapping-nommu.c | 37 const struct iommu_ops *iommu, bool coherent) in arch_setup_dma_ops() argument
|
| /openbmc/linux/arch/arc/mm/ |
| H A D | dma.c | 94 const struct iommu_ops *iommu, bool coherent) in arch_setup_dma_ops() argument
|
| /openbmc/linux/Documentation/translations/zh_CN/userspace-api/ |
| H A D | index.rst | 40 * iommu
|
| /openbmc/qemu/hw/intc/ |
| H A D | ioapic.c | 436 X86IOMMUState *iommu = x86_iommu_get_default(); in ioapic_machine_done_notify() local
437 if (iommu) { in ioapic_machine_done_notify()
441 x86_iommu_iec_register_notifier(iommu, ioapic_iec_notifier, s); in ioapic_machine_done_notify()
|
| /openbmc/linux/arch/arm64/boot/dts/qcom/ |
| H A D | msm8916.dtsi | 1811 apps_iommu: iommu@1ef0000 {
1814 #iommu-cells = <1>;
1815 compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
1824 iommu-ctx@3000 {
1831 iommu-ctx@4000 {
1838 iommu-ctx@5000 {
1845 gpu_iommu: iommu@1f08000 {
1848 #iommu-cells = <1>;
1849 compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
1857 iommu-ctx@1000 {
[all …]
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