1b7019ac5SIlia Mirkin /* SPDX-License-Identifier: MIT */
27974dd1bSBen Skeggs #ifndef __NVKM_DEVICE_TEGRA_H__
37974dd1bSBen Skeggs #define __NVKM_DEVICE_TEGRA_H__
47974dd1bSBen Skeggs #include <core/device.h>
543a70661SBen Skeggs #include <core/mm.h>
67974dd1bSBen Skeggs 
77974dd1bSBen Skeggs struct nvkm_device_tegra {
8e396ecd1SAlexandre Courbot 	const struct nvkm_device_tegra_func *func;
97974dd1bSBen Skeggs 	struct nvkm_device device;
107974dd1bSBen Skeggs 	struct platform_device *pdev;
1143a70661SBen Skeggs 
1243a70661SBen Skeggs 	struct reset_control *rst;
1343a70661SBen Skeggs 	struct clk *clk;
1434440ed6SAlexandre Courbot 	struct clk *clk_ref;
1543a70661SBen Skeggs 	struct clk *clk_pwr;
1643a70661SBen Skeggs 
1743a70661SBen Skeggs 	struct regulator *vdd;
1843a70661SBen Skeggs 
1943a70661SBen Skeggs 	struct {
2043a70661SBen Skeggs 		/*
2143a70661SBen Skeggs 		 * Protects accesses to mm from subsystems
2243a70661SBen Skeggs 		 */
2343a70661SBen Skeggs 		struct mutex mutex;
2443a70661SBen Skeggs 
2543a70661SBen Skeggs 		struct nvkm_mm mm;
2643a70661SBen Skeggs 		struct iommu_domain *domain;
2743a70661SBen Skeggs 		unsigned long pgshift;
2843a70661SBen Skeggs 	} iommu;
2943a70661SBen Skeggs 
3043a70661SBen Skeggs 	int gpu_speedo;
31d2680907SAlexandre Courbot 	int gpu_speedo_id;
327974dd1bSBen Skeggs };
337974dd1bSBen Skeggs 
34e396ecd1SAlexandre Courbot struct nvkm_device_tegra_func {
35e396ecd1SAlexandre Courbot 	/*
36e396ecd1SAlexandre Courbot 	 * If an IOMMU is used, indicates which address bit will trigger a
37e396ecd1SAlexandre Courbot 	 * IOMMU translation when set (when this bit is not set, IOMMU is
38e396ecd1SAlexandre Courbot 	 * bypassed). A value of 0 means an IOMMU is never used.
39e396ecd1SAlexandre Courbot 	 */
40e396ecd1SAlexandre Courbot 	u8 iommu_bit;
4134440ed6SAlexandre Courbot 	/*
4234440ed6SAlexandre Courbot 	 * Whether the chip requires a reference clock
4334440ed6SAlexandre Courbot 	 */
4434440ed6SAlexandre Courbot 	bool require_ref_clk;
45e6e1817aSAlexandre Courbot 	/*
46e6e1817aSAlexandre Courbot 	 * Whether the chip requires the VDD regulator
47e6e1817aSAlexandre Courbot 	 */
48e6e1817aSAlexandre Courbot 	bool require_vdd;
49e396ecd1SAlexandre Courbot };
50e396ecd1SAlexandre Courbot 
51e396ecd1SAlexandre Courbot int nvkm_device_tegra_new(const struct nvkm_device_tegra_func *,
52e396ecd1SAlexandre Courbot 			  struct platform_device *,
537974dd1bSBen Skeggs 			  const char *cfg, const char *dbg,
547974dd1bSBen Skeggs 			  bool detect, bool mmio, u64 subdev_mask,
557974dd1bSBen Skeggs 			  struct nvkm_device **);
567974dd1bSBen Skeggs #endif
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