/openbmc/linux/Documentation/devicetree/bindings/gpio/ |
H A D | nvidia,tegra186-gpio.yaml | 37 aliases" in address space, each of which access the same underlying 43 control a number of GPIOs. Thus, each GPIO is named according to an 47 The number of ports implemented by each GPIO controller varies. The number 48 of implemented GPIOs within each port varies. GPIO registers within a 68 each set of ports. Each GPIO may be configured to feed into a specific 70 for each generated signal to be routed to a different CPU, thus allowing 71 different CPUs to each handle subsets of the interrupts within a port. 72 The status of each of these per-port-set signals is reported via a
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/openbmc/linux/Documentation/ABI/testing/ |
H A D | ppc-memtrace | 14 you want removed from each NUMA node to this file - it must be 16 from each NUMA node in the kernel mappings and the following 18 removed from each node, the following files are created. To
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H A D | sysfs-kernel-mm-cma | 5 /sys/kernel/mm/cma/ contains a subdirectory for each CMA 8 Each CMA heap subdirectory (that is, each
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/openbmc/linux/tools/testing/selftests/rcutorture/doc/ |
H A D | TREE_RCU-kconfig.txt | 33 rcupdate.rcu_self_test_bh -- Do at least one each, offloaded and not. 34 rcupdate.rcu_self_test_sched -- Do at least one each, offloaded and not. 35 rcupdate.rcu_self_test -- Do at least one each, offloaded and not.
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/openbmc/linux/Documentation/devicetree/bindings/sound/ |
H A D | rt5663.txt | 24 compensate the DC offset for each L and R channel, and they are different 31 minimum, impedance maximum, volume, DC offset w/o and w/ mic of each L and 37 third column will be set to codec. In our codec design, each volume value
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/openbmc/linux/Documentation/PCI/endpoint/ |
H A D | pci-ntb-function.rst | 10 with each other by exposing each host as a device to the other host. 17 with each other by configuring the endpoint instances in such a way that 24 communicate with each other using SoC as a bridge. 63 exchange information with each other using this region. Config Region has 135 NTB applications can start communicating with each other. 187 Outbound Address Space for each of the interrupts. This region will 216 Doorbell Registers are used by the hosts to interrupt each other. 233 If one 32-bit BAR is allocated for each of these regions, the scheme would 247 However if we allocate a separate BAR for each of the regions, there would not 347 This is modeled the same was as MW1 but each of the additional memory windows
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/openbmc/linux/tools/memory-model/litmus-tests/ |
H A D | IRIW+fencembonceonces+OnceOnce.litmus | 7 * between each pairs of reads. In other words, is smp_mb() sufficient to 9 * of writes, where each write is to a different variable by a different
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/openbmc/linux/Documentation/devicetree/bindings/timer/ |
H A D | img,pistachio-gptimer.txt | 6 - interrupts: An interrupt for each of the four timers 7 - clocks: Should contain a clock specifier for each entry in clock-names
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/openbmc/linux/Documentation/devicetree/bindings/arm/omap/ |
H A D | l3-noc.txt | 12 - reg: Contains L3 register address range for each noc domain. 13 - ti,hwmods: "l3_main_1", ... One hwmod for each noc domain.
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/openbmc/linux/Documentation/devicetree/bindings/cpufreq/ |
H A D | imx-cpufreq-dt.txt | 6 the opp-supported-hw values for each OPP to check if the OPP is allowed. 11 For each opp entry in 'operating-points-v2' table:
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/openbmc/u-boot/doc/device-tree-bindings/pmic/ |
H A D | max77686.txt | 17 To bind each regulator, the optional regulators subnode should exists. 20 - voltage-regulators: subnode list of each device's regulator
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/openbmc/linux/Documentation/admin-guide/auxdisplay/ |
H A D | ks0108.rst | 37 :Addresses: 64 each page 38 :Data size: 1 byte each address
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/openbmc/linux/tools/testing/selftests/arm64/signal/ |
H A D | README | 11 - The above mentioned ops are configurable on a test-by-test basis: each test 15 executable is used for each test since many tests complete successfully 17 to run each test unit in its own standalone process, so as to start each
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/openbmc/u-boot/doc/device-tree-bindings/pinctrl/ |
H A D | pinctrl-bindings.txt | 9 designated client devices. Again, each client device must be represented as a 16 device is inactive. Hence, each client device can define a set of named 35 For each client device individually, every pin state is assigned an integer 36 ID. These numbers start at 0, and are contiguous. For each state ID, a unique 47 pinctrl-0: List of phandles, each pointing at a pin configuration 52 from multiple nodes for a single pin controller, each 65 pinctrl-1: List of phandles, each pointing at a pin configuration 68 pinctrl-n: List of phandles, each pointing at a pin configuration 120 The contents of each of those pin configuration child nodes is defined
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/openbmc/linux/net/rds/ |
H A D | info.c | 219 BUG_ON(lens.each == 0); in rds_info_getsockopt() 221 total = lens.nr * lens.each; in rds_info_getsockopt() 230 ret = lens.each; in rds_info_getsockopt()
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/openbmc/linux/Documentation/devicetree/bindings/pwm/ |
H A D | pwm.txt | 16 PWM properties should be named "pwms". The exact meaning of each pwms 17 property must be documented in the device tree binding for each device. 19 each of the PWM devices listed in the "pwms" property. If no "pwm-names"
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/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | ti-clkctrl.txt | 3 Texas Instruments SoCs can have a clkctrl clock controller for each 5 and interface clocks for each module. Each clkctrl controller can also 7 or more clock muxes. There is a clkctrl clock controller typically for each
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/openbmc/linux/Documentation/devicetree/bindings/nvmem/ |
H A D | lpc1857-eeprom.txt | 6 for each entry in reg-names. 10 - clocks: Must contain an entry for each entry in clock-names.
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H A D | nvmem-consumer.yaml | 27 Names for the each nvmem provider. 31 Names for each nvmem-cells specified.
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/openbmc/phosphor-dbus-interfaces/yaml/com/intel/Protocol/PECI/ |
H A D | Raw.interface.yaml | 16 An array of byte arrays where each byte array holds the raw 23 An array of byte arrays where each byte array holds the raw
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/openbmc/openbmc/poky/meta/conf/machine/include/ |
H A D | README | 17 with the machine configuration, or each other in a multilib 32 tuning ends up with features which conflict with each other. 38 specific tune. This is a list of features that a tune support, each 59 See each architecture's README for details for that CPU family. 64 each architecture. See each architectures README for details for that
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/openbmc/qemu/qapi/ |
H A D | stats.json | 29 # for each power of two. 121 # - which named values to return within each provider 185 # Returns: a list of StatsResult, one for each provider and object 186 # (e.g., for each vCPU). 200 # @name: name of the statistic; each element of the schema is uniquely 219 # width of each bucket of the histogram.
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/openbmc/linux/Documentation/scheduler/ |
H A D | sched-domains.rst | 13 i. The top domain for each CPU will generally span all CPUs in the system 29 Balancing within a sched domain occurs between groups. That is, each group 31 load of each of its member CPUs, and only when the load of a group becomes 34 In kernel/sched/core.c, trigger_load_balance() is run periodically on each CPU 59 of SMT, you'll span all siblings of the physical CPU, with each group being 64 of the SMP domain will span the entire machine, with each group having the
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/openbmc/linux/Documentation/admin-guide/device-mapper/ |
H A D | statistics.rst | 11 Individual statistics will be collected for each step-sized area within 14 The I/O statistics counters for each step-sized area of a region are 31 on each other's data. 55 the range is subdivided into areas each containing 78 nanoseconds. For each range, the kernel will report the 133 Print counters for each step-sized area of a region. 146 Output format for each step-sized area of a region: 210 Set the auxiliary data string to "foo bar baz" (the escape for each
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/openbmc/linux/Documentation/mm/damon/ |
H A D | design.rst | 124 Below four sections describe each of the DAMON core mechanisms and the five 137 other words, counts the number of the accesses to each page. After each 163 one page in the region is required to be checked. Thus, for each ``sampling 164 interval``, DAMON randomly picks one page in each region, waits for one 181 adaptively merges and splits each region based on their access frequency. 183 For each ``aggregation interval``, it compares the access frequencies of 186 splits each region into two or three regions if the total number of regions 201 yet another counter called ``age`` in each region. For each ``aggregation 271 each action is in the DAMON operations set layer because the implementation 337 to specify the weight of each access pattern property and passes the [all …]
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