| /openbmc/linux/drivers/clk/at91/ |
| H A D | at91rm9200.c | 25 .divisors = { 1, 2, 3, 4 },
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| H A D | at91sam9g45.c | 14 .divisors = { 1, 2, 4, 3 },
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| H A D | at91sam9n12.c | 14 .divisors = { 1, 2, 4, 3 },
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| H A D | sama5d3.c | 14 .divisors = { 1, 2, 4, 3 },
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| H A D | sama5d4.c | 14 .divisors = { 1, 2, 4, 3 },
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| H A D | at91sam9x5.c | 14 .divisors = { 1, 2, 4, 3 },
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| H A D | sam9x60.c | 15 .divisors = { 1, 2, 4, 3 },
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| H A D | sama5d2.c | 14 .divisors = { 1, 2, 4, 3 },
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| H A D | sama7g5.c | 952 .divisors = { 1, 2, 4, 3, 5 },
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| /openbmc/linux/Documentation/devicetree/bindings/serial/ |
| H A D | mvebu-uart.txt | 19 of UART. TBG clock (with UART TBG divisors d1=d2=1) or xtal clock
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| /openbmc/linux/arch/arm/lib/ |
| H A D | lib1funcs.S | 73 @ For very big divisors, we must shift it a bit at a time, or
160 @ For very big divisors, we must shift it a bit at a time, or
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| /openbmc/linux/drivers/sh/clk/ |
| H A D | core.c | 55 if (src_table->divisors && i < src_table->nr_divisors) in clk_rate_table_build()
56 div = src_table->divisors[i]; in clk_rate_table_build()
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| H A D | cpg.c | 271 .divisors = sh_clk_div6_divisors,
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| /openbmc/linux/include/linux/ |
| H A D | sh_clk.h | 90 unsigned int *divisors; member
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| /openbmc/linux/arch/sh/kernel/cpu/sh4a/ |
| H A D | clock-sh7786.c | 57 .divisors = div2,
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| /openbmc/u-boot/arch/arm/lib/ |
| H A D | lib1funcs.S | 59 @ For very big divisors, we must shift it a bit at a time, or
146 @ For very big divisors, we must shift it a bit at a time, or
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| /openbmc/linux/Documentation/devicetree/bindings/clock/ti/ |
| H A D | divider.txt | 63 - ti,dividers : array of integers defining divisors
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | at91sam9261.dtsi | 630 atmel,clk-divisors = <1 2 4 0>;
637 atmel,clk-divisors = <1 2 4 0>;
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| H A D | at91sam9260.dtsi | 167 atmel,clk-divisors = <1 2 4 0>;
174 atmel,clk-divisors = <1 2 4 0>;
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| H A D | at91sam9263.dtsi | 148 atmel,clk-divisors = <1 2 4 0>;
155 atmel,clk-divisors = <1 2 4 0>;
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| H A D | sama5d2.dtsi | 141 atmel,clk-divisors = <1 2 4 3>;
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| H A D | at91sam9rl.dtsi | 864 atmel,clk-divisors = <1 2 4 0>;
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| H A D | at91sam9n12.dtsi | 172 atmel,clk-divisors = <1 2 4 3>;
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| /openbmc/linux/Documentation/driver-api/media/ |
| H A D | camera-sensor.rst | 15 divisors. The clock tree is generally configured by the driver based on a few
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| /openbmc/linux/drivers/gpu/drm/vmwgfx/device_include/ |
| H A D | svga3d_cmd.h | 1072 SVGA3dVertexDivisor divisors[SVGA3D_MAX_VERTEX_ARRAYS]; member
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