/openbmc/linux/tools/power/cpupower/utils/idle_monitor/ |
H A D | cpupower-monitor.c | 438 cpu_top.pkgs, cpu_top.cores, cpu_count); in cmd_monitor()
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/openbmc/linux/Documentation/devicetree/bindings/riscv/ |
H A D | cpus.yaml | 23 two cores, each of which has two hyperthreads, could be described as
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/openbmc/linux/Documentation/admin-guide/pm/ |
H A D | cpuidle.rst | 47 least one program at a time. The cores need not be entirely independent of each 51 time. The entire cores are CPUs in that case and if the hardware is asked to 55 units containing the core). Namely, if all of the cores in the larger unit 59 other cores in that unit. 65 the cores present themselves to software as "bundles" each consisting of 74 it may be put into an idle state as a whole (if the other cores within the 369 For example, take a processor with two cores in a larger unit referred to as 384 will start to execute the first new instruction (assuming that both cores in the
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/openbmc/u-boot/board/freescale/t102xrdb/ |
H A D | README | 14 - two e5500 cores, each with a private 256 KB L2 cache 104 - T1023 SoC integrating two 64-bit e5500 cores up to 1.4GHz
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/openbmc/u-boot/board/freescale/t104xrdb/ |
H A D | README | 40 processor cores with high-performance data path acceleration architecture 45 - Four e5500 cores, each with a private 256 KB L2 cache
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/openbmc/docs/designs/ |
H A D | power-systems-memory-preserving-reboot.md | 78 the SBE on each of the processors. SBE stops the running cores and collects the 131 systems, an additional s0 interrupt will be sent to SBE to stop the cores
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/openbmc/qemu/docs/system/arm/ |
H A D | orangepi.rst | 174 they may be slow to emulate, especially due to emulating the 4 cores. 175 To help reduce the performance slow down due to emulating the 4 cores, you can
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/openbmc/linux/Documentation/admin-guide/sysctl/ |
H A D | kernel.rst | 194 When collecting cores via a pipe to an application, it is occasionally 207 value are noted via the kernel log and their cores are skipped. 1641 The default cpumask is all possible cores, but if ``NO_HZ_FULL`` is 1642 enabled in the kernel config, and cores are specified with the 1643 ``nohz_full=`` boot argument, those cores are excluded by default. 1644 Offline cores can be included in this mask, and if the core is later 1648 to re-enable cores that by default were not running the watchdog, 1649 if a kernel lockup was suspected on those cores. 1652 so for example to enable the watchdog on cores 0, 2, 3, and 4 you
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/openbmc/linux/Documentation/networking/device_drivers/ethernet/stmicro/ |
H A D | stmmac.rst | 319 Timestamps, new GMAC cores support the advanced timestamp features. 470 30) HW uses GMAC>4 cores:: 494 36) HW uses XGMAC>2.10 cores::
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/openbmc/qemu/hw/core/ |
H A D | machine.c | 872 .has_cores = true, .cores = ms->smp.cores, in machine_get_smp() 1148 ms->smp.cores = 1; in machine_initfn()
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/openbmc/openbmc/poky/documentation/dev-manual/ |
H A D | speeding-up-build.rst | 30 As mentioned, these variables all scale to the number of processor cores
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/openbmc/linux/Documentation/devicetree/bindings/power/ |
H A D | rockchip,power-controller.yaml | 22 IP cores belonging to a power domain should contain a
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H A D | mediatek,power-controller.yaml | 17 IP cores belonging to a power domain should contain a 'power-domains'
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/openbmc/linux/drivers/crypto/caam/ |
H A D | Kconfig | 122 than job ring interface when the number of cores are more than the
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/openbmc/ipmitool/lib/ |
H A D | ipmi_dcmi.c | 2607 uint16_t cores; in ipmi_nm_policy() local 2698 if (str2ushort(argv[1], &cores) < 0) { in ipmi_nm_policy() 2702 if ((cores < 1) || (cores > 127)) { in ipmi_nm_policy() 2707 policy.policy_limits = cores << 1; in ipmi_nm_policy()
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/openbmc/linux/arch/arm/mm/ |
H A D | Kconfig | 358 bool "Accept early Feroceon cores with an ARM926 ID" 362 This enables the usage of some old Feroceon cores 802 bool "Workaround for I-Cache line size mismatch between CPU cores" 806 LITTLE and big cores. Say Y here to enable a workaround for 822 Some cores are synthesizable to have various sized cache. For
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/openbmc/linux/Documentation/admin-guide/hw-vuln/ |
H A D | processor_mmio_stale_data.rst | 38 shared by all client cores. For non-coherent reads that go to sideband 48 buffer, the primary response buffer is shared by all client cores. For some
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/openbmc/linux/kernel/sched/ |
H A D | topology.c | 1282 int cpu, cores = 0, max_cpu = -1; in init_sched_groups_capacity() local 1288 cores++; in init_sched_groups_capacity() 1293 sg->cores = cores; in init_sched_groups_capacity()
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/openbmc/linux/include/linux/bcma/ |
H A D | bcma.h | 351 struct list_head cores; member
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/openbmc/linux/Documentation/networking/device_drivers/ethernet/freescale/dpaa2/ |
H A D | ethernet-driver.rst | 121 DPCONs are used to distribute ingress traffic to different CPUs via the cores'
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/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | baikal,bt1-ccu-div.yaml | 33 | +----+------|- MIPS P5600 cores
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/openbmc/qemu/ |
H A D | .travis.yml | 50 # https://travis-ci.community/t/nproc-reports-32-cores-on-arm64/5851
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/openbmc/linux/Documentation/devicetree/bindings/cpufreq/ |
H A D | cpufreq-qcom-hw.yaml | 195 # On some SoCs the Prime core shares the LMH irq with Big cores
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/openbmc/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | ti,k3-dsp-rproc.yaml | 20 cores in the K3 SoCs are usually either a TMS320C66x CorePac processor or a
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8qxp.dtsi | 58 /* We have 1 clusters with 4 Cortex-A35 cores */
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