/openbmc/linux/drivers/bcma/ |
H A D | scan.c | 251 list_for_each_entry(core, &bus->cores, list) { in bcma_find_core_by_index() 262 list_for_each_entry_reverse(core, &bus->cores, list) { in bcma_find_core_reverse() 515 list_add_tail(&core->list, &bus->cores); in bcma_bus_scan()
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/openbmc/linux/arch/arm64/boot/dts/marvell/ |
H A D | armada-ap810-ap0-octa-core.dtsi | 5 * Device Tree file for Marvell Armada AP810 OCTA cores.
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/openbmc/u-boot/arch/arm/dts/ |
H A D | fsl-imx8-ca35.dtsi | 14 /* We have 1 clusters having 4 Cortex-A35 cores */
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/openbmc/u-boot/arch/arc/ |
H A D | Kconfig | 18 The original ARC ISA of ARC600/700 cores 23 ISA for the Next Generation ARC-HS cores
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/openbmc/linux/drivers/gpu/drm/v3d/ |
H A D | v3d_drv.c | 240 v3d->cores = V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_NCORES); in v3d_platform_drm_probe() 241 WARN_ON(v3d->cores > 1); /* multicore not yet implemented */ in v3d_platform_drm_probe()
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/openbmc/linux/Documentation/devicetree/bindings/gpio/ |
H A D | gpio-grgpio.txt | 1 Aeroflex Gaisler GRGPIO General Purpose I/O cores.
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H A D | gpio-dsp-keystone.txt | 3 HOST OS userland running on ARM can send interrupts to DSP cores using
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/openbmc/linux/arch/powerpc/platforms/86xx/ |
H A D | Kconfig | 8 The Freescale E600 SoCs have 74xx cores.
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/openbmc/linux/drivers/hwmon/peci/ |
H A D | Kconfig | 11 readings of the CPU package and CPU cores that are accessible via
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/openbmc/qemu/tests/docker/dockerfiles/ |
H A D | debian-xtensa-cross.docker | 5 # using a prebuilt toolchains for Xtensa cores from:
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/openbmc/linux/Documentation/devicetree/bindings/arm/rockchip/ |
H A D | pmu.yaml | 15 This includes the power to the CPU cores.
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/openbmc/u-boot/board/ti/am65x/ |
H A D | README | 8 cores, voltage domains and peripherals: 24 firmware on the r5 cores like.... autosar can be loaded to receive CAN
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/openbmc/qemu/hw/s390x/ |
H A D | cpu-topology.c | 343 if (s390_topology.cores_per_socket[entry] >= ms->smp.cores) { in s390_topology_setup_cpu() 415 ms->smp.cores) { in s390_change_topology()
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/openbmc/linux/Documentation/admin-guide/hw-vuln/ |
H A D | reg-file-data-sampling.rst | 6 only affects Intel Atom parts(also branded as E-cores). RFDS may allow 53 before VMentry. None of the affected cores support SMT, so VERW is not required
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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | arm,nvic.txt | 4 Cortex-M based processor cores. The NVIC implemented on different SoCs
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H A D | ti,keystone-irq.txt | 3 On Keystone SOCs, DSP cores can send interrupts to ARM
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/openbmc/linux/Documentation/devicetree/bindings/arm/omap/ |
H A D | mpu.txt | 3 The MPU subsystem contain one or several ARM cores
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/openbmc/linux/Documentation/devicetree/bindings/csky/ |
H A D | cpus.txt | 35 Description: Describes one of SMP cores
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/openbmc/linux/Documentation/devicetree/bindings/soc/fsl/ |
H A D | bman-portals.txt | 13 interaction by software running on processor cores, accelerators and network
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/openbmc/openbmc/poky/meta/recipes-support/lz4/ |
H A D | lz4_1.9.4.bb | 2 …hm, providing compression speed at 400 MB/s per core, scalable with multi-cores CPU. It also featu…
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/openbmc/linux/Documentation/devicetree/bindings/arm/ |
H A D | nvidia,tegra194-ccplex.yaml | 16 symmetric cores. Compatible string in "cpus" node represents the CPU
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/openbmc/linux/Documentation/devicetree/bindings/cache/ |
H A D | andestech,ax45mp-cache.yaml | 16 is shared between cores, and a non-inclusive non-exclusive policy is used.
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/openbmc/linux/Documentation/devicetree/bindings/perf/ |
H A D | arm,dsu-pmu.yaml | 15 ARM DynamIQ Shared Unit (DSU) integrates one or more CPU cores with a shared
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/openbmc/linux/arch/arm/boot/dts/calxeda/ |
H A D | ecx-2000.dts | 8 /* First 4KB has pen for secondary cores. */
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/openbmc/qemu/hw/loongarch/ |
H A D | virt.c | 200 num / (ms->smp.cores * ms->smp.threads), in fdt_add_cpu_nodes() 201 (num / ms->smp.threads) % ms->smp.cores, in fdt_add_cpu_nodes() 206 num / ms->smp.cores, in fdt_add_cpu_nodes() 207 num % ms->smp.cores); in fdt_add_cpu_nodes() 1040 n / (ms->smp.cores * ms->smp.threads); in virt_possible_cpu_arch_ids() 1043 n / ms->smp.threads % ms->smp.cores; in virt_possible_cpu_arch_ids()
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