| /openbmc/linux/arch/sh/kernel/cpu/sh3/ |
| H A D | clock-sh7712.c | 21 static void master_clk_init(struct clk *clk) in master_clk_init() argument
26 clk->rate *= multipliers[idx]; in master_clk_init()
33 static unsigned long module_clk_recalc(struct clk *clk) in module_clk_recalc() argument
38 return clk->parent->rate / divisors[idx]; in module_clk_recalc()
45 static unsigned long cpu_clk_recalc(struct clk *clk) in cpu_clk_recalc() argument
50 return clk->parent->rate / divisors[idx]; in cpu_clk_recalc()
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| /openbmc/u-boot/Documentation/devicetree/bindings/clk/ |
| H A D | fsl,mpc83xx-clk.txt | 7 - compatible: must be one of "fsl,mpc8308-clk",
8 "fsl,mpc8309-clk",
9 "fsl,mpc8313-clk",
10 "fsl,mpc8315-clk",
11 "fsl,mpc832x-clk",
12 "fsl,mpc8349-clk",
13 "fsl,mpc8360-clk",
14 "fsl,mpc8379-clk"
21 compatible = "fsl,mpc832x-clk";
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| /openbmc/linux/arch/arm/plat-orion/include/plat/ |
| H A D | common.h | 20 struct clk *clk);
25 struct clk *clk);
30 struct clk *clk);
35 struct clk *clk);
101 struct clk *clk);
103 void __init orion_clkdev_init(struct clk *tclk);
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| /openbmc/u-boot/drivers/clk/exynos/ |
| H A D | clk-exynos7420.c | 67 static ulong exynos7420_topc_get_rate(struct clk *clk) in exynos7420_topc_get_rate() argument
69 struct exynos7420_clk_topc_priv *priv = dev_get_priv(clk->dev); in exynos7420_topc_get_rate()
71 switch (clk->id) { in exynos7420_topc_get_rate()
93 struct clk in_clk; in exynos7420_clk_topc_probe()
122 static ulong exynos7420_top0_get_rate(struct clk *clk) in exynos7420_top0_get_rate() argument
127 switch (clk->id) { in exynos7420_top0_get_rate()
144 struct clk in_clk; in exynos7420_clk_top0_probe()
170 static ulong exynos7420_peric1_get_rate(struct clk *clk) in exynos7420_peric1_get_rate() argument
172 struct clk in_clk; in exynos7420_peric1_get_rate()
176 switch (clk->id) { in exynos7420_peric1_get_rate()
[all …]
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| /openbmc/linux/drivers/clk/ |
| H A D | clk-gpio.c | 53 struct clk_gpio *clk = to_clk_gpio(hw); in clk_gpio_gate_enable() local
55 gpiod_set_value(clk->gpiod, 1); in clk_gpio_gate_enable()
62 struct clk_gpio *clk = to_clk_gpio(hw); in clk_gpio_gate_disable() local
64 gpiod_set_value(clk->gpiod, 0); in clk_gpio_gate_disable()
69 struct clk_gpio *clk = to_clk_gpio(hw); in clk_gpio_gate_is_enabled() local
71 return gpiod_get_value(clk->gpiod); in clk_gpio_gate_is_enabled()
82 struct clk_gpio *clk = to_clk_gpio(hw); in clk_sleeping_gpio_gate_prepare() local
91 struct clk_gpio *clk = to_clk_gpio(hw); in clk_sleeping_gpio_gate_unprepare() local
98 struct clk_gpio *clk = to_clk_gpio(hw); in clk_sleeping_gpio_gate_is_prepared() local
119 struct clk_gpio *clk = to_clk_gpio(hw); in clk_gpio_mux_get_parent() local
[all …]
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| H A D | clk-bulk.c | 23 clks[i].clk = NULL; in of_clk_bulk_get()
28 clks[i].clk = of_clk_get(np, i); in of_clk_bulk_get()
29 if (IS_ERR(clks[i].clk)) { in of_clk_bulk_get()
30 ret = PTR_ERR(clks[i].clk); in of_clk_bulk_get()
33 clks[i].clk = NULL; in of_clk_bulk_get()
75 clk_put(clks[num_clks].clk); in clk_bulk_put()
76 clks[num_clks].clk = NULL; in clk_bulk_put()
88 clks[i].clk = NULL; in __clk_bulk_get()
92 if (IS_ERR(clks[i].clk)) { in __clk_bulk_get()
93 ret = PTR_ERR(clks[i].clk); in __clk_bulk_get()
[all …]
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| /openbmc/linux/drivers/clk/rockchip/ |
| H A D | clk.c | 117 return hw->clk; in rockchip_clk_register_branch()
201 struct clk *clk, unsigned int id) in rockchip_clk_add_lookup() argument
311 return hw->clk; in rockchip_clk_register_frac_branch()
359 return hw->clk; in rockchip_clk_register_factor_branch()
411 struct clk *clk; in rockchip_clk_register_plls() local
421 if (IS_ERR(clk)) { in rockchip_clk_register_plls()
436 struct clk *clk = NULL; in rockchip_clk_register_branches() local
559 if (!clk) { in rockchip_clk_register_branches()
584 struct clk *clk; in rockchip_clk_register_armclk() local
589 if (IS_ERR(clk)) { in rockchip_clk_register_armclk()
[all …]
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| /openbmc/linux/drivers/clocksource/ |
| H A D | arm_arch_timer.c | 165 struct clock_event_device *clk) in arch_timer_reg_read() argument
867 clk->name = "arch_sys_timer"; in __arch_timer_setup()
868 clk->rating = 450; in __arch_timer_setup()
888 clk->set_next_event = sne; in __arch_timer_setup()
892 clk->name = "arch_mem_timer"; in __arch_timer_setup()
893 clk->rating = 400; in __arch_timer_setup()
898 clk->set_next_event = in __arch_timer_setup()
903 clk->set_next_event = in __arch_timer_setup()
910 clk->set_state_shutdown(clk); in __arch_timer_setup()
1161 clk->set_state_shutdown(clk); in arch_timer_stop()
[all …]
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| H A D | mps2-timer.c | 101 struct clk *clk = NULL; in mps2_clockevent_init() local
109 clk = of_clk_get(np, 0); in mps2_clockevent_init()
110 if (IS_ERR(clk)) { in mps2_clockevent_init()
111 ret = PTR_ERR(clk); in mps2_clockevent_init()
122 rate = clk_get_rate(clk); in mps2_clockevent_init()
178 clk_put(clk); in mps2_clockevent_init()
186 struct clk *clk = NULL; in mps2_clocksource_init() local
193 clk = of_clk_get(np, 0); in mps2_clocksource_init()
194 if (IS_ERR(clk)) { in mps2_clocksource_init()
195 ret = PTR_ERR(clk); in mps2_clocksource_init()
[all …]
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| H A D | timer-sp804.c | 62 static long __init sp804_get_clock_rate(struct clk *clk, const char *name) in sp804_get_clock_rate() argument
66 if (!clk) in sp804_get_clock_rate()
68 if (IS_ERR(clk)) { in sp804_get_clock_rate()
70 return PTR_ERR(clk); in sp804_get_clock_rate()
76 clk_put(clk); in sp804_get_clock_rate()
80 return clk_get_rate(clk); in sp804_get_clock_rate()
107 struct clk *clk, in sp804_clocksource_and_sched_clock_init() argument
205 struct clk *clk, const char *name) in sp804_clockevents_init() argument
347 struct clk *clk; in integrator_cp_of_init() local
356 if (IS_ERR(clk)) { in integrator_cp_of_init()
[all …]
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| /openbmc/linux/drivers/clk/imx/ |
| H A D | clk-imx6sx.c | 177 clk_set_parent(hws[IMX6SX_PLL1_BYPASS]->clk, hws[IMX6SX_CLK_PLL1]->clk); in imx6sx_clocks_init()
178 clk_set_parent(hws[IMX6SX_PLL2_BYPASS]->clk, hws[IMX6SX_CLK_PLL2]->clk); in imx6sx_clocks_init()
179 clk_set_parent(hws[IMX6SX_PLL3_BYPASS]->clk, hws[IMX6SX_CLK_PLL3]->clk); in imx6sx_clocks_init()
180 clk_set_parent(hws[IMX6SX_PLL4_BYPASS]->clk, hws[IMX6SX_CLK_PLL4]->clk); in imx6sx_clocks_init()
181 clk_set_parent(hws[IMX6SX_PLL5_BYPASS]->clk, hws[IMX6SX_CLK_PLL5]->clk); in imx6sx_clocks_init()
182 clk_set_parent(hws[IMX6SX_PLL6_BYPASS]->clk, hws[IMX6SX_CLK_PLL6]->clk); in imx6sx_clocks_init()
183 clk_set_parent(hws[IMX6SX_PLL7_BYPASS]->clk, hws[IMX6SX_CLK_PLL7]->clk); in imx6sx_clocks_init()
514 clk_set_parent(hws[IMX6SX_CLK_ENET_SEL]->clk, hws[IMX6SX_CLK_ENET_PODF]->clk); in imx6sx_clocks_init()
542 clk_set_parent(hws[IMX6SX_CLK_CAN_SEL]->clk, hws[IMX6SX_CLK_PLL3_60M]->clk); in imx6sx_clocks_init()
548 clk_set_parent(hws[IMX6SX_CLK_QSPI1_SEL]->clk, hws[IMX6SX_CLK_PLL2_BUS]->clk); in imx6sx_clocks_init()
[all …]
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| /openbmc/linux/drivers/media/platform/mediatek/mdp/ |
| H A D | mtk_mdp_comp.c | 18 for (i = 0; i < ARRAY_SIZE(comp->clk); i++) { in mtk_mdp_comp_clock_on()
19 if (IS_ERR(comp->clk[i])) in mtk_mdp_comp_clock_on()
21 err = clk_prepare_enable(comp->clk[i]); in mtk_mdp_comp_clock_on()
33 for (i = 0; i < ARRAY_SIZE(comp->clk); i++) { in mtk_mdp_comp_clock_off()
34 if (IS_ERR(comp->clk[i])) in mtk_mdp_comp_clock_off()
36 clk_disable_unprepare(comp->clk[i]); in mtk_mdp_comp_clock_off()
50 for (i = 0; i < ARRAY_SIZE(comp->clk); i++) { in mtk_mdp_comp_init()
51 comp->clk[i] = of_clk_get(node, i); in mtk_mdp_comp_init()
52 if (IS_ERR(comp->clk[i])) { in mtk_mdp_comp_init()
53 ret = dev_err_probe(dev, PTR_ERR(comp->clk[i]), in mtk_mdp_comp_init()
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| /openbmc/linux/drivers/clk/ti/ |
| H A D | clk-3xxx.c | 51 memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg)); in omap3430es2_clk_ssi_find_idlest()
84 memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg)); in omap3430es2_clk_dss_usbhost_find_idlest()
122 memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg)); in omap3430es2_clk_hsotgusb_find_idlest()
147 static void am35xx_clk_find_idlest(struct clk_hw_omap *clk, in am35xx_clk_find_idlest() argument
152 memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg)); in am35xx_clk_find_idlest()
175 memcpy(other_reg, &clk->enable_reg, sizeof(*other_reg)); in am35xx_clk_find_companion()
176 if (clk->enable_bit & AM35XX_IPSS_ICK_MASK) in am35xx_clk_find_companion()
179 *other_bit = clk->enable_bit - AM35XX_IPSS_ICK_FCK_OFFSET; in am35xx_clk_find_companion()
203 memcpy(idlest_reg, &clk->enable_reg, sizeof(*idlest_reg)); in am35xx_clk_ipss_find_idlest()
277 struct clk *dpll5_clk; in omap3_clk_lock_dpll5()
[all …]
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| H A D | clkctrl.c | 50 struct clk_hw *clk; member
137 if (clk->clkdm) { in _omap4_clkctrl_clk_enable()
138 ret = ti_clk_ll_ops->clkdm_clk_enable(clk->clkdm, hw->clk); in _omap4_clkctrl_clk_enable()
148 if (!clk->enable_bit) in _omap4_clkctrl_clk_enable()
178 if (!clk->enable_bit) in _omap4_clkctrl_clk_disable()
200 if (clk->clkdm) in _omap4_clkctrl_clk_disable()
201 ti_clk_ll_ops->clkdm_clk_disable(clk->clkdm, hw->clk); in _omap4_clkctrl_clk_disable()
247 return entry->clk; in _ti_omap4_clkctrl_xlate()
292 struct clk *clk; in _ti_clkctrl_clk_register() local
517 struct clk *clk; in _ti_omap4_clkctrl_setup() local
[all …]
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| /openbmc/linux/arch/arm/boot/dts/st/ |
| H A D | stih418-clock.dtsi | 10 clk_sysin: clk-sysin {
17 clk_tmdsout_hdmi: clk-tmdsout-hdmi {
47 clk_m_a9: clk-m-a9 {
59 arm_periph_clk: clk-m-a9-periphs {
73 clk_s_a0_pll: clk-s-a0-pll {
80 clk_s_a0_flexgen: clk-s-a0-flexgen {
94 clk_s_c0_pll0: clk-s-c0-pll0 {
101 clk_s_c0_pll1: clk-s-c0-pll1 {
108 clk_s_c0_quadfs: clk-s-c0-quadfs {
148 clk_s_d0_quadfs: clk-s-d0-quadfs {
[all …]
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| H A D | stih410-clock.dtsi | 10 clk_sysin: clk-sysin {
17 clk_tmdsout_hdmi: clk-tmdsout-hdmi {
47 clk_m_a9: clk-m-a9 {
59 arm_periph_clk: clk-m-a9-periphs {
73 clk_s_a0_pll: clk-s-a0-pll {
80 clk_s_a0_flexgen: clk-s-a0-flexgen {
94 clk_s_c0_pll0: clk-s-c0-pll0 {
101 clk_s_c0_pll1: clk-s-c0-pll1 {
108 clk_s_c0_quadfs: clk-s-c0-quadfs {
148 clk_s_d0_quadfs: clk-s-d0-quadfs {
[all …]
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| /openbmc/linux/arch/sh/kernel/cpu/sh2a/ |
| H A D | clock-sh7203.c | 27 static void master_clk_init(struct clk *clk) in master_clk_init() argument
29 clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * pll2_mult; in master_clk_init()
36 static unsigned long module_clk_recalc(struct clk *clk) in module_clk_recalc() argument
39 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
46 static unsigned long bus_clk_recalc(struct clk *clk) in bus_clk_recalc() argument
49 return clk->parent->rate / pfc_divisors[idx-2]; in bus_clk_recalc()
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| /openbmc/linux/arch/sh/kernel/cpu/sh2/ |
| H A D | clock-sh7619.c | 23 static void master_clk_init(struct clk *clk) in master_clk_init() argument
25 clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7]; in master_clk_init()
32 static unsigned long module_clk_recalc(struct clk *clk) in module_clk_recalc() argument
35 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
42 static unsigned long bus_clk_recalc(struct clk *clk) in bus_clk_recalc() argument
44 return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7]; in bus_clk_recalc()
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| /openbmc/linux/drivers/clk/keystone/ |
| H A D | pll.c | 120 static struct clk *clk_register_pll(struct device *dev, in clk_register_pll()
127 struct clk *clk; in clk_register_pll() local
142 clk = clk_register(NULL, &pll->hw); in clk_register_pll()
143 if (IS_ERR(clk)) in clk_register_pll()
146 return clk; in clk_register_pll()
162 struct clk *clk; in _of_pll_clk_init() local
212 if (!IS_ERR_OR_NULL(clk)) { in _of_pll_clk_init()
253 struct clk *clk; in of_pll_div_clk_init() local
284 if (IS_ERR(clk)) { in of_pll_div_clk_init()
302 struct clk *clk; in of_pll_mux_clk_init() local
[all …]
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| /openbmc/linux/drivers/clk/hisilicon/ |
| H A D | clk-hi3559a.c | 386 val &= ~(((1 << clk->frac_width) - 1) << clk->frac_shift); in clk_pll_set_rate()
387 val &= ~(((1 << clk->postdiv1_width) - 1) << clk->postdiv1_shift); in clk_pll_set_rate()
388 val &= ~(((1 << clk->postdiv2_width) - 1) << clk->postdiv2_shift); in clk_pll_set_rate()
396 val &= ~(((1 << clk->fbdiv_width) - 1) << clk->fbdiv_shift); in clk_pll_set_rate()
397 val &= ~(((1 << clk->refdiv_width) - 1) << clk->refdiv_shift); in clk_pll_set_rate()
416 val = val >> clk->frac_shift; in clk_pll_recalc_rate()
421 val = val >> clk->postdiv1_shift; in clk_pll_recalc_rate()
431 val = val >> clk->fbdiv_shift; in clk_pll_recalc_rate()
436 val = val >> clk->refdiv_shift; in clk_pll_recalc_rate()
460 struct clk *clk = NULL; in hisi_clk_register_pll() local
[all …]
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| /openbmc/linux/drivers/phy/qualcomm/ |
| H A D | phy-qcom-usb-hsic.c | 21 struct clk *phy_clk;
22 struct clk *cal_clk;
23 struct clk *cal_sleep_clk;
108 struct clk *clk; in qcom_usb_hsic_phy_probe() local
120 uphy->phy_clk = clk = devm_clk_get(&ulpi->dev, "phy"); in qcom_usb_hsic_phy_probe()
121 if (IS_ERR(clk)) in qcom_usb_hsic_phy_probe()
122 return PTR_ERR(clk); in qcom_usb_hsic_phy_probe()
125 if (IS_ERR(clk)) in qcom_usb_hsic_phy_probe()
126 return PTR_ERR(clk); in qcom_usb_hsic_phy_probe()
129 if (IS_ERR(clk)) in qcom_usb_hsic_phy_probe()
[all …]
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| /openbmc/linux/drivers/cpufreq/ |
| H A D | imx6q-cpufreq.c | 128 clk_set_parent(clks[PLL1_SW].clk, clks[PLL1_SYS].clk); in imx6q_set_target()
130 clk_set_parent(clks[SECONDARY_SEL].clk, in imx6q_set_target()
131 clks[PLL2_BUS].clk); in imx6q_set_target()
134 clks[PLL2_PFD2_396M].clk); in imx6q_set_target()
135 clk_set_parent(clks[STEP].clk, clks[SECONDARY_SEL].clk); in imx6q_set_target()
136 clk_set_parent(clks[PLL1_SW].clk, clks[STEP].clk); in imx6q_set_target()
139 clk_set_parent(clks[PLL1_SW].clk, clks[PLL1_SYS].clk); in imx6q_set_target()
142 clk_set_parent(clks[STEP].clk, clks[PLL2_PFD2_396M].clk); in imx6q_set_target()
143 clk_set_parent(clks[PLL1_SW].clk, clks[STEP].clk); in imx6q_set_target()
146 clk_set_parent(clks[PLL1_SW].clk, clks[PLL1_SYS].clk); in imx6q_set_target()
[all …]
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| /openbmc/linux/sound/soc/sof/mediatek/mt8186/ |
| H A D | mt8186-clk.c | 30 priv->clk = devm_kcalloc(dev, ADSP_CLK_MAX, sizeof(*priv->clk), GFP_KERNEL); in mt8186_adsp_init_clock()
31 if (!priv->clk) in mt8186_adsp_init_clock()
35 priv->clk[i] = devm_clk_get(dev, adsp_clks[i]); in mt8186_adsp_init_clock()
37 if (IS_ERR(priv->clk[i])) in mt8186_adsp_init_clock()
38 return PTR_ERR(priv->clk[i]); in mt8186_adsp_init_clock()
50 ret = clk_prepare_enable(priv->clk[CLK_TOP_AUDIODSP]); in adsp_enable_all_clock()
57 ret = clk_prepare_enable(priv->clk[CLK_TOP_ADSP_BUS]); in adsp_enable_all_clock()
61 clk_disable_unprepare(priv->clk[CLK_TOP_AUDIODSP]); in adsp_enable_all_clock()
72 clk_disable_unprepare(priv->clk[CLK_TOP_ADSP_BUS]); in adsp_disable_all_clock()
73 clk_disable_unprepare(priv->clk[CLK_TOP_AUDIODSP]); in adsp_disable_all_clock()
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| /openbmc/linux/arch/m68k/include/asm/ |
| H A D | mcfclk.h | 10 struct clk;
13 void (*enable)(struct clk *);
14 void (*disable)(struct clk *);
17 struct clk { struct
33 static struct clk __clk_##clk_bank##_##clk_slot = { \ argument
39 void __clk_init_enabled(struct clk *);
40 void __clk_init_disabled(struct clk *);
43 static struct clk clk_##clk_ref = { \
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| /openbmc/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3368.c | 58 static ulong rk3368_clk_get_rate(struct clk *clk);
198 static ulong rk3368_mmc_find_best_rate_and_parent(struct clk *clk, in rk3368_mmc_find_best_rate_and_parent() argument
249 static ulong rk3368_mmc_set_clk(struct clk *clk, ulong rate) in rk3368_mmc_set_clk() argument
452 static ulong rk3368_clk_get_rate(struct clk *clk) in rk3368_clk_get_rate() argument
458 switch (clk->id) { in rk3368_clk_get_rate()
484 static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate) in rk3368_clk_set_rate() argument
490 switch (clk->id) { in rk3368_clk_set_rate()
521 static int __maybe_unused rk3368_gmac_set_parent(struct clk *clk, struct clk *parent) in rk3368_gmac_set_parent() argument
558 static int __maybe_unused rk3368_clk_set_parent(struct clk *clk, struct clk *parent) in rk3368_clk_set_parent() argument
560 switch (clk->id) { in rk3368_clk_set_parent()
[all …]
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