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Searched refs:bypass (Results 26 – 50 of 320) sorted by relevance

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/openbmc/linux/drivers/pwm/
H A Dpwm-sun4i.c173 bool *bypass) in sun4i_pwm_calculate() argument
180 *bypass = sun4i_pwm->data->has_direct_mod_clk_output && in sun4i_pwm_calculate()
187 if (*bypass) in sun4i_pwm_calculate()
241 bool bypass; in sun4i_pwm_apply() local
254 &bypass); in sun4i_pwm_apply()
266 if (bypass) { in sun4i_pwm_apply()
H A Dpwm-lpss.c57 .bypass = true,
176 pwm_lpss_cond_enable(pwm, lpwm->info->bypass == false); in pwm_lpss_prepare_enable()
181 pwm_lpss_cond_enable(pwm, lpwm->info->bypass == true); in pwm_lpss_prepare_enable()
/openbmc/linux/drivers/power/supply/
H A Dbq25980_charger.c31 bool bypass; member
306 if (bq->state.bypass) in bq25980_set_input_curr_lim()
328 if (bq->state.bypass) { in bq25980_get_input_volt_lim()
350 if (bq->state.bypass) { in bq25980_set_input_volt_lim()
454 bq->state.bypass = en_bypass; in bq25980_set_bypass()
456 return bq->state.bypass; in bq25980_set_bypass()
604 state->bypass = chg_ctrl_2 & BQ25980_EN_BYPASS; in bq25980_get_state()
766 else if (state.bypass) in bq25980_get_charger_property()
768 else if (!state.bypass) in bq25980_get_charger_property()
828 old_state.bypass != new_state->bypass); in bq25980_state_changed()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/ti/
H A Dfapll.txt7 (reference clock and bypass clock), and one or more child
15 - clocks : link phandles of parent clocks (clk-ref and clk-bypass)
H A Dapll.txt7 (reference clock and bypass clock), with analog phase locked
19 - clocks : link phandles of parent clocks (clk-ref and clk-bypass)
/openbmc/linux/arch/arm/mach-omap2/
H A Dsram.c242 static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
244 u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass) in omap2_set_prcm() argument
247 return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass); in omap2_set_prcm()
/openbmc/linux/net/sched/
H A Dsch_fifo.c99 bool bypass; in __fifo_init() local
119 bypass = sch->limit >= psched_mtu(qdisc_dev(sch)); in __fifo_init()
121 bypass = sch->limit >= 1; in __fifo_init()
123 if (bypass) in __fifo_init()
/openbmc/linux/drivers/clk/at91/
H A Dat91rm9200.c86 bool bypass; in at91rm9200_pmc_setup() local
109 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91rm9200_pmc_setup()
112 bypass); in at91rm9200_pmc_setup()
H A Dat91sam9g45.c101 bool bypass; in at91sam9g45_pmc_setup() local
124 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91sam9g45_pmc_setup()
127 bypass); in at91sam9g45_pmc_setup()
H A Dat91sam9n12.c121 bool bypass; in at91sam9n12_pmc_setup() local
148 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91sam9n12_pmc_setup()
151 bypass); in at91sam9n12_pmc_setup()
H A Dsama5d3.c123 bool bypass; in sama5d3_pmc_setup() local
151 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in sama5d3_pmc_setup()
154 bypass); in sama5d3_pmc_setup()
H A Dsama5d4.c138 bool bypass; in sama5d4_pmc_setup() local
166 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in sama5d4_pmc_setup()
169 bypass); in sama5d4_pmc_setup()
/openbmc/u-boot/doc/device-tree-bindings/clock/
H A Dst,stm32mp1.txt62 0x0: bypass (division by 1)
174 - "st,bypass" Configure the oscillator bypass mode (HSEBYP, LSEBYP)
175 - "st,digbypass" Configure the bypass mode as full-swing digital signal
189 st,bypass;
/openbmc/linux/Documentation/devicetree/bindings/hwmon/
H A Dadt7475.yaml55 "^adi,bypass-attenuator-in[0-4]$":
99 adi,bypass-attenuator-in0 = <1>;
100 adi,bypass-attenuator-in1 = <0>;
/openbmc/linux/drivers/md/bcache/
H A Drequest.c192 if (op->bypass) in bch_data_insert_start()
271 op->bypass = true; in bch_data_insert_start()
313 op->writeback, op->bypass); in bch_data_insert()
867 !s->cache_missed, s->iop.bypass); in cached_dev_read_done_bh()
888 if (s->cache_miss || s->iop.bypass) { in cached_dev_cache_miss()
982 s->iop.bypass = false; in cached_dev_write()
994 s->iop.bypass = true; in cached_dev_write()
998 s->iop.bypass)) { in cached_dev_write()
999 s->iop.bypass = false; in cached_dev_write()
1003 if (s->iop.bypass) { in cached_dev_write()
[all …]
/openbmc/linux/Documentation/networking/
H A Dnf_flowtable.rst21 transmitted to the output netdevice via neigh_xmit(), hence, packets bypass the
38 forwarding path including the Netfilter hooks and the flowtable fastpath bypass.
68 |__yes_________________fastpath bypass ____________________________|
84 Enabling the flowtable bypass is relatively easy, you only need to create a
109 forwarding bypass.
137 allows the flowtable to define a fastpath bypass between the bridge ports
143 fastpath bypass
/openbmc/u-boot/drivers/clk/sifive/
H A Dfu540-prci.c179 void (*bypass)(struct __prci_data *pd); member
437 if (pwd->bypass) in sifive_fu540_prci_wrpll_set_rate()
438 pwd->bypass(pd); in sifive_fu540_prci_wrpll_set_rate()
487 .bypass = __prci_coreclksel_use_hfclk,
/openbmc/qemu/hw/block/
H A Dpflash_cfi02.c82 int bypass; member
249 if (pfl->bypass) { in pflash_timer()
516 if (!pfl->bypass && boff != pfl->unlock_addr0) { in pflash_write()
522 pfl->bypass = 1; in pflash_write()
544 if (pfl->bypass) { in pflash_write()
567 if (pfl->bypass) in pflash_write()
571 if (pfl->bypass && cmd == 0x00) { in pflash_write()
700 pfl->bypass = 0; in pflash_write()
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/User/
H A DTOTPAuthenticator.interface.yaml50 User level multi-factor authentication bypass settings. This interface
51 will be implemented by user D-bus object to support user's MFA bypass
/openbmc/linux/drivers/base/regmap/
H A Dregcache.c358 bool bypass; in regcache_sync() local
368 bypass = map->cache_bypass; in regcache_sync()
399 map->cache_bypass = bypass; in regcache_sync()
451 bool bypass; in regcache_sync_region() local
461 bypass = map->cache_bypass; in regcache_sync_region()
480 map->cache_bypass = bypass; in regcache_sync_region()
/openbmc/linux/include/linux/platform_data/x86/
H A Dpwm-lpss.h22 bool bypass; member
/openbmc/linux/include/uapi/linux/netfilter/
H A Dxt_NFQUEUE.h27 __u16 bypass; member
/openbmc/linux/Documentation/devicetree/bindings/display/bridge/
H A Dfsl,imx8qxp-ldb.yaml53 - description: bypass clock
58 - const: bypass
139 clock-names = "pixel", "bypass";
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_s10.h76 u32 bypass; member
104 u32 bypass; member
H A Dclock_manager_arria10.h17 u32 bypass; member
44 u32 bypass; member

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