1163152cbSTony LindgrenBinding for Texas Instruments FAPLL clock.
2163152cbSTony Lindgren
3163152cbSTony LindgrenBinding status: Unstable - ABI compatibility may be broken in the future
4163152cbSTony Lindgren
5163152cbSTony LindgrenThis binding uses the common clock binding[1]. It assumes a
6163152cbSTony Lindgrenregister-mapped FAPLL with usually two selectable input clocks
7163152cbSTony Lindgren(reference clock and bypass clock), and one or more child
8163152cbSTony Lindgrensyntesizers.
9163152cbSTony Lindgren
10163152cbSTony Lindgren[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
11163152cbSTony Lindgren
12163152cbSTony LindgrenRequired properties:
13163152cbSTony Lindgren- compatible : shall be "ti,dm816-fapll-clock"
14163152cbSTony Lindgren- #clock-cells : from common clock binding; shall be set to 0.
15163152cbSTony Lindgren- clocks : link phandles of parent clocks (clk-ref and clk-bypass)
16163152cbSTony Lindgren- reg : address and length of the register set for controlling the FAPLL.
17163152cbSTony Lindgren
18163152cbSTony LindgrenExamples:
19163152cbSTony Lindgren	main_fapll: main_fapll {
20163152cbSTony Lindgren		#clock-cells = <1>;
21163152cbSTony Lindgren		compatible = "ti,dm816-fapll-clock";
22163152cbSTony Lindgren		reg = <0x400 0x40>;
23163152cbSTony Lindgren		clocks = <&sys_clkin_ck &sys_clkin_ck>;
24163152cbSTony Lindgren		clock-indices = <1>, <2>, <3>, <4>, <5>,
25163152cbSTony Lindgren				<6>, <7>;
26163152cbSTony Lindgren		clock-output-names = "main_pll_clk1",
27163152cbSTony Lindgren				     "main_pll_clk2",
28163152cbSTony Lindgren				     "main_pll_clk3",
29163152cbSTony Lindgren				     "main_pll_clk4",
30163152cbSTony Lindgren				     "main_pll_clk5",
31163152cbSTony Lindgren				     "main_pll_clk6",
32163152cbSTony Lindgren				     "main_pll_clk7";
33163152cbSTony Lindgren	};
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