| /openbmc/linux/tools/perf/util/ |
| H A D | s390-cpumsf.c | 536 pr_debug4("%s pos:%#zx ip:%#" PRIx64 " P:%d CL:%d pid:%d.%d cpumode:%d cpu:%d\n", in s390_cpumsf_make_event()
624 pr_err("[%#08" PRIx64 "] Invalid AUX trailer entry TOD clock base\n", in s390_cpumsf_samples()
746 pr_debug4("%s queue_nr:%d buffer:%" PRId64 " offset:%#" PRIx64 " size:%#zx rest:%#zx\n", in s390_cpumsf_run_decoder()
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| H A D | intel-bts.c | 110 color_fprintf(stdout, color, " %"PRIx64" -> %"PRIx64" %s\n", in intel_bts_dump()
815 pr_debug("Synthesizing 'branches' event with id %" PRIu64 " sample type %#" PRIx64 "\n", in intel_bts_synth_events()
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| /openbmc/qemu/hw/timer/ |
| H A D | pxa2xx_timer.c | 392 "(value 0x%08" PRIx64 ")\n", __func__, offset, value); in pxa2xx_timer_write()
397 "(value 0x%08" PRIx64 ")\n", __func__, offset, value); in pxa2xx_timer_write()
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| /openbmc/qemu/hw/net/ |
| H A D | vhost_net.c | 219 fprintf(stderr, "vhost lacks feature mask 0x%" PRIx64 in vhost_net_init()
231 fprintf(stderr, "vhost lacks feature mask 0x%" PRIx64 in vhost_net_init()
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| /openbmc/linux/tools/testing/selftests/mm/ |
| H A D | uffd-common.c | 378 err("clear WP failed: address=0x%"PRIx64, (uint64_t)start); in wp_range()
393 err("UFFDIO_CONTINUE failed for address 0x%" PRIx64, in continue_range()
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| /openbmc/qemu/hw/arm/ |
| H A D | nrf51_soc.c | 47 qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " <- 0x%" PRIx64 " [%u]\n", in clock_write()
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| H A D | boot.c | 416 nodename = g_strdup_printf("/memory@%" PRIx64, mem_base); in fdt_add_memory_node()
609 fprintf(stderr, "couldn't add /memory@%"PRIx64" node\n", in arm_load_dtb()
620 fprintf(stderr, "couldn't add /memory@%"PRIx64" node\n", in arm_load_dtb()
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| /openbmc/qemu/hw/sparc64/ |
| H A D | sun4u_iommu.c | 230 "reg 0x%" HWADDR_PRIx " size 0x%x value 0x%" PRIx64 "\n", in iommu_mem_write()
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| /openbmc/qemu/hw/intc/ |
| H A D | pnv_xive.c | 136 xive_error(xive, "VST: failed to access %s entry %x @0x%" PRIx64, in pnv_xive_vst_addr_indirect()
165 PRIx64, info->name, vsd_idx, vsd_addr); in pnv_xive_vst_addr_indirect()
621 xive_error(xive, "VST: failed to access %s entry @0x%" PRIx64, in pnv_xive_vst_per_subpage()
794 xive_error(xive, "VST: %s table address 0x%"PRIx64" is not aligned with" in pnv_xive_vst_set_exclusive()
1484 xive_error(xive, "IC: forwarded at @0x%"HWADDR_PRIx" IRQ 0x%"PRIx64, in pnv_xive_ic_notify_write()
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| /openbmc/qemu/hw/ppc/ |
| H A D | pnv_i2c.c | 304 qemu_log_mask(LOG_GUEST_ERROR, "I2C: invalid command 0x%"PRIx64"\n", in pnv_i2c_handle_cmd()
553 HWADDR_PRIx " val=0x%"PRIx64"\n", addr >> 3, val); in pnv_i2c_xscom_write()
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| H A D | pnv_lpc.c | 162 name = g_strdup_printf("lpcm-opb@%"PRIx64, lpcm_addr); in pnv_dt_lpc()
594 HWADDR_PRIx " val=0x%08"PRIx64"\n", addr, val); in opb_master_write()
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| /openbmc/qemu/hw/virtio/ |
| H A D | vhost-shadow-virtqueue.c | 58 error_setg(errp, "SVQ Invalid device feature flags, offer: 0x%"PRIx64 in vhost_svq_valid_features()
59 ", ok: 0x%"PRIx64, features, svq_features); in vhost_svq_valid_features()
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| H A D | virtio-iommu.c | 964 error_report_once("%s no mapping for 0x%"PRIx64" for sid=%d", in virtio_iommu_translate()
980 error_report_once("%s permission error on 0x%"PRIx64"(%d): allowed=%d", in virtio_iommu_translate()
1135 error_setg(errp, "virtio-iommu %s reports a page size mask 0x%"PRIx64 in virtio_iommu_set_page_size_mask()
1136 " incompatible with currently supported mask 0x%"PRIx64, in virtio_iommu_set_page_size_mask()
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| /openbmc/qemu/hw/core/ |
| H A D | machine.c | 602 "maximum memory size (0x%" PRIx64 ") must be at least " in machine_set_mem()
603 "the initial memory size (0x%" PRIx64 ")", in machine_set_mem()
610 "(0x%" PRIx64 ") is equal to the initial memory size " in machine_set_mem()
611 "(0x%" PRIx64 ")", mem->max_size, mem->size); in machine_set_mem()
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| /openbmc/qemu/include/sysemu/ |
| H A D | dma.h | 33 #define DMA_ADDR_FMT "%" PRIx64
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| /openbmc/qemu/hw/ssi/ |
| H A D | omap_spi.c | 305 "%s: invalid WL value (%" PRIx64 ")\n", in omap_mcspi_write()
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| /openbmc/qemu/contrib/elf2dmp/ |
| H A D | pdb.c | 74 printf("%s: 0x%016x(%d:\'%.8s\') + 0x%08x = 0x%09"PRIx64"\n", name, in pdb_find_public_v3_symbol()
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| /openbmc/qemu/hw/pci-host/ |
| H A D | articia.c | 127 HWADDR_PRIx " %d <- %"PRIx64"\n", __func__, addr, size, val); in articia_reg_write()
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| /openbmc/phosphor-host-postd/ |
| H A D | main.cpp | 214 fprintf(stderr, "Code: 0x%" PRIx64 "\n", code); in PostCodeEventHandler()
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| /openbmc/qemu/hw/misc/ |
| H A D | bcm2835_mbox.c | 239 " value 0x%"PRIx64"\n", in bcm2835_mbox_write()
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| /openbmc/qemu/hw/i2c/ |
| H A D | mpc_i2c.c | 237 DPRINTF("%s: addr " HWADDR_FMT_plx " val %08" PRIx64 "\n", __func__, in mpc_i2c_write()
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| /openbmc/qemu/hw/net/rocker/ |
| H A D | rocker-hmp-cmds.c | 35 monitor_printf(mon, "id: 0x%" PRIx64 "\n", rocker->id); in hmp_rocker()
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| /openbmc/qemu/hw/mips/ |
| H A D | fuloong2e.c | 146 "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s", in load_kernel()
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| /openbmc/linux/tools/perf/ui/gtk/ |
| H A D | annotate.c | 67 return scnprintf(buf, size, "%"PRIx64, start + dl->al.offset); in perf_gtk__get_offset()
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| /openbmc/qemu/target/microblaze/ |
| H A D | mmu.c | 172 "MMU vaddr=%" PRIx64 " rw=%d tlb_wr=%d tlb_ex=%d hit=%d\n", in mmu_translate()
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