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Searched refs:PCLK_PWM (Results 26 – 36 of 36) sorted by relevance

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/openbmc/u-boot/arch/arm/dts/
H A Drk3288.dtsi523 clocks = <&cru PCLK_PWM>;
535 clocks = <&cru PCLK_PWM>;
547 clocks = <&cru PCLK_PWM>;
559 clocks = <&cru PCLK_PWM>;
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3036.c414 GATE(PCLK_PWM, "pclk_pwm", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 10, GFLAGS),
H A Dclk-rk3128.c505 GATE(PCLK_PWM, "pclk_pwm", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 10, GFLAGS),
H A Dclk-rk3228.c608 GATE(PCLK_PWM, "pclk_rk_pwm", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 7, GFLAGS),
H A Dclk-rk3328.c778 GATE(PCLK_PWM, "pclk_rk_pwm", "pclk_bus", 0, RK3328_CLKGATE_CON(16), 6, GFLAGS),
H A Dclk-rv1108.c630 GATE(PCLK_PWM, "pclk_pwm", "pclk_bus_pre", 0,
H A Dclk-rk3288.c683 GATE(PCLK_PWM, "pclk_pwm", "pclk_cpu", 0, RK3288_CLKGATE_CON(10), 0, GFLAGS),
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3328.dtsi456 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
467 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
478 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
490 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3288.c773 case PCLK_PWM: in rk3288_clk_get_rate()
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos7.c670 GATE(PCLK_PWM, "pclk_pwm", "mout_aclk_peric0_66_user",
/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7.dtsi632 clocks = <&clock_peric0 PCLK_PWM>;

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