/openbmc/linux/arch/arm/boot/dts/ti/omap/ |
H A D | am335x-netcom-plus-2xx.dts | 100 "MDC",
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H A D | am335x-netcom-plus-8xx.dts | 132 "MDC",
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H A D | am335x-baltos-ir3220.dts | 134 "MDC",
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H A D | am335x-baltos-ir5221.dts | 158 "MDC",
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/openbmc/linux/arch/arm/boot/dts/microchip/ |
H A D | lan966x-pcb8290.dts | 30 /* MDC, MDIO */
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H A D | lan966x-kontron-kswitch-d10-mmt.dtsi | 62 /* MDC, MDIO */
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/openbmc/linux/drivers/net/ethernet/sis/ |
H A D | sis900.c | 874 sw32(mear, MDIO | MDDIR | MDC); in mdio_idle() 886 sw32(mear, MDDIR | MDIO | MDC); in mdio_reset() 918 sw32(mear, dataval | MDC); in mdio_read() 927 sw32(mear, MDC); in mdio_read() 964 sw8(mear, dataval | MDC); in mdio_write() 975 sw32(mear, dataval | MDC); in mdio_write() 984 sw8(mear, MDC); in mdio_write()
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/openbmc/u-boot/arch/arm/dts/ |
H A D | mt7623n-bananapi-bpi-r2.dts | 118 "MDC", "MDIO";
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H A D | armada-8040-clearfog-gt-8k.dts | 221 * [28] CP1 SMI MDC
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H A D | meson-gxbb-odroidc2.dts | 202 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
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H A D | meson-gxbb-nanopi-k2.dts | 206 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
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/openbmc/linux/arch/arm/boot/dts/gemini/ |
H A D | gemini-nas4220b.dts | 67 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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H A D | gemini-dlink-dir-685.dts | 192 /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */
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/openbmc/u-boot/doc/device-tree-bindings/pinctrl/ |
H A D | marvell,mvebu-pinctrl.txt | 99 * [27,31] GE_MDIO/MDC
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/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | fsl-fman.txt | 269 from which the MDC frequency is derived. 274 Definition: Specifies the external MDC frequency, in Hertz, to 302 become corrupt unless it is read within 16 MDC cycles
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/openbmc/u-boot/drivers/net/phy/ |
H A D | miiphybb.c | 81 MDC(v); in bb_set_mdc_wrap()
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/openbmc/linux/arch/powerpc/boot/dts/ |
H A D | mpc832x_rdb.dts | 178 3 5 1 0 2 0 /* MDC */
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/openbmc/linux/arch/powerpc/boot/dts/fsl/ |
H A D | mpc8568mds.dts | 180 0x4 0x5 0x1 0x0 0x2 0x0>; /* MDC */
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/openbmc/linux/arch/arm64/boot/dts/amlogic/ |
H A D | meson-gxbb-odroidc2.dts | 290 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
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H A D | meson-gxbb-nanopi-k2.dts | 247 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
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/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/ |
H A D | README.falcon | 150 in U-Boot. Normal U-Boot sets the MDC ratio to generate a proper clock signal.
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/openbmc/linux/arch/arm/boot/dts/marvell/ |
H A D | armada-385-clearfog-gtr.dtsi | 26 4,5 - MDC/MDIO
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/openbmc/linux/arch/arm64/boot/dts/marvell/ |
H A D | armada-8040-clearfog-gt-8k.dts | 440 * [28] CP1 SMI MDC
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mq-zii-ultra.dtsi | 22 gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>, /* MDC */
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/openbmc/linux/drivers/dma/ |
H A D | Kconfig | 257 tristate "IMG MDC support" 263 Enable support for the IMG multi-threaded DMA controller (MDC).
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