Searched refs:KHz (Results 76 – 100 of 132) sorted by relevance
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130 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
194 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
147 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
233 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
221 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
83 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
246 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
171 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
93 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
358 pwms = <&pwm_ab 0 30518 0>; /* PWM_A at 32.768KHz */
66 - ti,sleep-keep-ck32k: Keep the 32KHz clock output on in sleep state.
32 60ms,100ms,175ms respectively for 48KHz sample rate.
230 regulator-name = "32KHz AP";
228 regulator-name = "32KHz AP";
399 regulator-name = "32KHz AP";404 regulator-name = "32KHz CP";
464 * if 96KHz only AltSets nb.1 of each interface must be selected465 * if samples are using 24bits/48KHz then AltSet 2 must me used if468 * if samples are using 16bits/48KHz then AltSet 4 must me used if
527 /* Clock frequency was not specified downstream, let's park it to 100 KHz */535 /* Clock frequency was not specified downstream, let's park it to 100 KHz */
197 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
81 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
49 /* KHz uV */
341 pwms = <&pwm_ab 0 30518 0>; /* PWM_A at 32.768KHz */
115 - drm-maxfreq-<keystr>: <uint> [Hz|MHz|KHz]
92 - 10 or 20 KHz - level 4, used for dma-sound
71 .frequency_min = 500000, /* KHz */72 .frequency_max = 2500000, /* KHz */
77 approximately 10KHz.