Searched refs:CPURISCVState (Results 26 – 41 of 41) sorted by relevance
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| /openbmc/qemu/target/riscv/ |
| H A D | vcrypto_helper.c | 202 void HELPER(egs_check)(uint32_t egs, CPURISCVState *env) in RVVCALL()
218 void HELPER(NAME)(void *vd, void *vs2, CPURISCVState *env, \
244 void HELPER(NAME)(void *vd, void *vs2, CPURISCVState *env, \
304 CPURISCVState *env, uint32_t desc)
352 CPURISCVState *env, uint32_t desc) in HELPER()
460 void HELPER(vsha2ms_vv)(void *vd, void *vs1, void *vs2, CPURISCVState *env, in HELPER()
578 void HELPER(vsha2ch32_vv)(void *vd, void *vs1, void *vs2, CPURISCVState *env, in HELPER()
670 CPURISCVState *env, uint32_t desc) in HELPER()
771 CPURISCVState *env, uint32_t desc) in HELPER()
797 CPURISCVState *env, uint32_t desc) in HELPER()
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| H A D | arch_dump.c | 72 CPURISCVState *env = &cpu->env; in riscv_cpu_write_elf64_note()
141 CPURISCVState *env = &cpu->env; in riscv_cpu_write_elf32_note()
168 CPURISCVState *env; in cpu_get_dump_info()
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| H A D | cpu.c | 444 CPURISCVState *env = &cpu->env; in riscv_any_cpu_init()
465 CPURISCVState *env = &cpu->env; in riscv_max_cpu_init()
484 CPURISCVState *env = &cpu->env; in rv64_base_cpu_init()
499 CPURISCVState *env = &cpu->env; in rv64_sifive_u_cpu_init()
606 CPURISCVState *env = &cpu->env; in rv128_base_cpu_init()
643 CPURISCVState *env = &cpu->env; in rv32_base_cpu_init()
658 CPURISCVState *env = &cpu->env; in rv32_sifive_u_cpu_init()
764 CPURISCVState *env = &cpu->env; in riscv_cpu_dump_state()
890 CPURISCVState *env = &cpu->env; in riscv_cpu_set_pc()
902 CPURISCVState *env = &cpu->env; in riscv_cpu_get_pc()
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| H A D | vector_internals.c | 59 CPURISCVState *env, uint32_t desc, in do_vext_vv()
85 CPURISCVState *env, uint32_t desc, in do_vext_vx()
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| H A D | time_helper.h | 25 void riscv_timer_write_timecmp(CPURISCVState *env, QEMUTimer *timer,
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| H A D | zce_helper.c | 25 target_ulong HELPER(cm_jalt)(CPURISCVState *env, uint32_t index) in HELPER()
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| /openbmc/qemu/hw/intc/ |
| H A D | riscv_aclint.c | 134 CPURISCVState *env = cpu ? cpu_env(cpu) : NULL; in riscv_aclint_mtimer_read()
177 CPURISCVState *env = cpu ? cpu_env(cpu) : NULL; in riscv_aclint_mtimer_write()
236 CPURISCVState *env = cpu ? cpu_env(cpu) : NULL; in riscv_aclint_mtimer_write()
378 CPURISCVState *env = cpu ? cpu_env(cpu) : NULL; in riscv_aclint_mtimer_create()
412 CPURISCVState *env = cpu ? cpu_env(cpu) : NULL; in riscv_aclint_swi_read()
435 CPURISCVState *env = cpu ? cpu_env(cpu) : NULL; in riscv_aclint_swi_write()
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| H A D | riscv_imsic.c | 336 CPURISCVState *env = cpu ? cpu_env(cpu) : NULL; in riscv_imsic_realize()
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| /openbmc/qemu/linux-user/riscv/ |
| H A D | target_proc.h | 14 const RISCVCPUConfig *cfg = riscv_cpu_cfg((CPURISCVState *) cpu_env); in open_cpuinfo()
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| H A D | cpu_loop.c | 29 void cpu_loop(CPURISCVState *env) in cpu_loop()
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| /openbmc/qemu/target/riscv/insn_trans/ |
| H A D | trans_rvm.c.inc | 173 tcg_gen_ld_tl(rdh, tcg_env, offsetof(CPURISCVState, retxh));
216 tcg_gen_ld_tl(rdh, tcg_env, offsetof(CPURISCVState, retxh));
248 tcg_gen_ld_tl(rdh, tcg_env, offsetof(CPURISCVState, retxh));
293 tcg_gen_ld_tl(rdh, tcg_env, offsetof(CPURISCVState, retxh));
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| H A D | trans_privileged.c.inc | 66 offsetof(CPURISCVState, badaddr));
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| H A D | trans_rvi.c.inc | 884 tcg_gen_ld_tl(desth, tcg_env, offsetof(CPURISCVState, retxh));
907 tcg_gen_ld_tl(desth, tcg_env, offsetof(CPURISCVState, retxh));
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| H A D | trans_rvv.c.inc | 234 return offsetof(CPURISCVState, vreg) + reg * s->cfg_ptr->vlenb;
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| /openbmc/qemu/hw/riscv/ |
| H A D | boot.c | 54 CPURISCVState *env = &RISCV_CPU(cs)->env; in riscv_plic_hart_config_string()
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| /openbmc/qemu/linux-user/ |
| H A D | syscall.c | 8877 static void risc_hwprobe_fill_pairs(CPURISCVState *env, in risc_hwprobe_fill_pairs()
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