277 void riscv_cpu_set_misa(CPURISCVState *env, RISCVMXL mxl, uint32_t ext)  in riscv_cpu_set_misa()
380     CPURISCVState *env = &cpu->env;  in riscv_any_cpu_init()
405     CPURISCVState *env = &cpu->env;  in riscv_max_cpu_init()
422     CPURISCVState *env = &RISCV_CPU(obj)->env;  in rv64_base_cpu_init()
435     CPURISCVState *env = &cpu->env;  in rv64_sifive_u_cpu_init()
452     CPURISCVState *env = &RISCV_CPU(obj)->env;  in rv64_sifive_e_cpu_init()
469     CPURISCVState *env = &RISCV_CPU(obj)->env;  in rv64_thead_c906_cpu_init()
500     CPURISCVState *env = &RISCV_CPU(obj)->env;  in rv64_veyron_v1_cpu_init()
546     CPURISCVState *env = &RISCV_CPU(obj)->env;  in rv128_base_cpu_init()
558     CPURISCVState *env = &RISCV_CPU(obj)->env;  in rv32_base_cpu_init()
571     CPURISCVState *env = &cpu->env;  in rv32_sifive_u_cpu_init()
588     CPURISCVState *env = &RISCV_CPU(obj)->env;  in rv32_sifive_e_cpu_init()
605     CPURISCVState *env = &RISCV_CPU(obj)->env;  in rv32_ibex_cpu_init()
622     CPURISCVState *env = &RISCV_CPU(obj)->env;  in rv32_imafcu_nommu_cpu_init()
669     CPURISCVState *env = &cpu->env;  in riscv_cpu_dump_state()
795     CPURISCVState *env = &cpu->env;  in riscv_cpu_set_pc()
807     CPURISCVState *env = &cpu->env;  in riscv_cpu_get_pc()
820     CPURISCVState *env = &cpu->env;  in riscv_cpu_has_work()
842     CPURISCVState *env = &cpu->env;  in riscv_cpu_reset_hold()
928     CPURISCVState *env = &cpu->env;  in riscv_cpu_disas_set_info()
1144     CPURISCVState *env = &cpu->env;  in riscv_cpu_set_irq()
1508     CPURISCVState *env = &cpu->env;  in riscv_gdb_arch_name()