Searched refs:BUS (Results 201 – 213 of 213) sorted by relevance
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/openbmc/qemu/hw/display/ |
H A D | sm501.c | 1912 qdev_realize_and_unref(DEVICE(ddc), BUS(s->i2c_bus), &error_abort); in sm501_init()
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/openbmc/qemu/hw/ide/ |
H A D | ahci.c | 951 BusState *qbus = BUS(bus); in ahci_populate_sglist()
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/openbmc/linux/Documentation/scsi/ |
H A D | ChangeLog.ncr53c8xx | 487 This option enables checking of SCSI BUS data lines after SCSI
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/openbmc/qemu/hw/arm/ |
H A D | aspeed.c | 323 qdev_realize_and_unref(dev, BUS(s->spi), &error_fatal); in aspeed_board_init_flashes()
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/openbmc/qemu/hw/scsi/ |
H A D | trace-events | 274 lsi_do_msgout_busdevicereset(uint32_t tag) "MSG: BUS DEVICE RESET tag=0x%"PRIx32
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H A D | lsi53c895a.c | 1883 bus_cold_reset(BUS(&s->bus)); in lsi_reg_writeb()
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/openbmc/qemu/hw/ppc/ |
H A D | pnv.c | 507 qbus_walk_children(BUS(pnv->isa_bus), pnv_dt_isa_device, NULL, NULL, NULL, in pnv_dt_isa()
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H A D | spapr.c | 4345 (SpaprPhbState *)object_dynamic_cast(OBJECT(BUS(root)->parent), in spapr_get_hotplug_handler()
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/hddtemp/hddtemp/ |
H A D | hddtemp_0.3-beta15-52.diff | 1885 - fprintf(fstrm, "=== BUS ERROR (%p) : invalid access to %p, in 0x%08x\n", 1886 + fprintf(fstrm, "=== BUS ERROR (%p) : invalid access to %p, in %p\n",
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/openbmc/qemu/hw/i386/ |
H A D | acpi-build.c | 1606 crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), &crs_range_set, in build_dsdt()
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/openbmc/linux/Documentation/networking/ |
H A D | can.rst | 1296 "ERROR-WARNING", "ERROR-PASSIVE", "BUS-OFF" or "STOPPED"
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/openbmc/linux/Documentation/sound/kernel-api/ |
H A D | writing-an-alsa-driver.rst | 133 for PCI soundcards and the code specific to the PCI BUS.
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/openbmc/u-boot/ |
H A D | README | 315 CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which
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