Searched hist:ff6fd147 (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/arch/arm/mach-socfpga/ |
| H A D | l2_cache.c | ff6fd147 Mon Mar 21 11:01:45 CDT 2016 Thor Thayer <tthayer@opensource.altera.com> ARM: socfpga: Enable Arria10 L2 cache ECC on startup
Enable ECC for Arria10 L2 cache on machine startup. The ECC has to be
enabled before data is stored in memory otherwise the ECC will fail on
reads.
Use DT_MACHINE to select Arria10 L2 cache function.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1458576106-24505-9-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
ff6fd147 Mon Mar 21 11:01:45 CDT 2016 Thor Thayer <tthayer@opensource.altera.com> ARM: socfpga: Enable Arria10 L2 cache ECC on startup
Enable ECC for Arria10 L2 cache on machine startup. The ECC has to be
enabled before data is stored in memory otherwise the ECC will fail on
reads.
Use DT_MACHINE to select Arria10 L2 cache function.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1458576106-24505-9-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
|
| H A D | core.h | ff6fd147 Mon Mar 21 11:01:45 CDT 2016 Thor Thayer <tthayer@opensource.altera.com> ARM: socfpga: Enable Arria10 L2 cache ECC on startup
Enable ECC for Arria10 L2 cache on machine startup. The ECC has to be
enabled before data is stored in memory otherwise the ECC will fail on
reads.
Use DT_MACHINE to select Arria10 L2 cache function.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1458576106-24505-9-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
ff6fd147 Mon Mar 21 11:01:45 CDT 2016 Thor Thayer <tthayer@opensource.altera.com> ARM: socfpga: Enable Arria10 L2 cache ECC on startup
Enable ECC for Arria10 L2 cache on machine startup. The ECC has to be
enabled before data is stored in memory otherwise the ECC will fail on
reads.
Use DT_MACHINE to select Arria10 L2 cache function.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1458576106-24505-9-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
|
| H A D | socfpga.c | ff6fd147 Mon Mar 21 11:01:45 CDT 2016 Thor Thayer <tthayer@opensource.altera.com> ARM: socfpga: Enable Arria10 L2 cache ECC on startup
Enable ECC for Arria10 L2 cache on machine startup. The ECC has to be
enabled before data is stored in memory otherwise the ECC will fail on
reads.
Use DT_MACHINE to select Arria10 L2 cache function.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1458576106-24505-9-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
ff6fd147 Mon Mar 21 11:01:45 CDT 2016 Thor Thayer <tthayer@opensource.altera.com> ARM: socfpga: Enable Arria10 L2 cache ECC on startup
Enable ECC for Arria10 L2 cache on machine startup. The ECC has to be
enabled before data is stored in memory otherwise the ECC will fail on
reads.
Use DT_MACHINE to select Arria10 L2 cache function.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1458576106-24505-9-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
|