Searched hist:fb823981 (Results 1 – 1 of 1) sorted by relevance
| /openbmc/u-boot/drivers/mmc/ |
| H A D | fsl_esdhc.c | fb823981 Mon Mar 24 02:40:41 CDT 2014 Andrew Gabbasov <andrew_gabbasov@mentor.com> mmc: fsl_esdhc: fix calculation of timeout for data transactions
Calculation of the timeout value should be based on actual clock value,
written to controller registers. Since mmc->tran_speed is either the
maximum allowed speed, or the preliminary value, that is be not yet
set to registers, the actual timeout, taken by the controller, based
on its clock settings, may be much longer than expected, based on
mmc->tran_speed value. In particular it happens at early initialization
stage, when typical value of mmc->tran_speed is 20MHz or 26MHz, while
actual clock setting, configured in the controller, is 400kHz.
It's more correct to use mmc->clock value for timeout calculation instead.
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
|