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/openbmc/linux/drivers/clk/bcm/
H A Dclk-nsp.cf713c6bf Thu Oct 15 14:48:29 CDT 2015 Jon Mason <jonmason@broadcom.com> clk: iproc: Split off dig_filter

The PLL loop filter/gain can be located in a separate register on some
SoCs. Split these off into a separate variable, so that an offset can
be added if necessary. Also, make the necessary modifications to the
Cygnus and NSP drivers for this change.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
f713c6bf Thu Oct 15 14:48:29 CDT 2015 Jon Mason <jonmason@broadcom.com> clk: iproc: Split off dig_filter

The PLL loop filter/gain can be located in a separate register on some
SoCs. Split these off into a separate variable, so that an offset can
be added if necessary. Also, make the necessary modifications to the
Cygnus and NSP drivers for this change.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
H A Dclk-cygnus.cf713c6bf Thu Oct 15 14:48:29 CDT 2015 Jon Mason <jonmason@broadcom.com> clk: iproc: Split off dig_filter

The PLL loop filter/gain can be located in a separate register on some
SoCs. Split these off into a separate variable, so that an offset can
be added if necessary. Also, make the necessary modifications to the
Cygnus and NSP drivers for this change.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
f713c6bf Thu Oct 15 14:48:29 CDT 2015 Jon Mason <jonmason@broadcom.com> clk: iproc: Split off dig_filter

The PLL loop filter/gain can be located in a separate register on some
SoCs. Split these off into a separate variable, so that an offset can
be added if necessary. Also, make the necessary modifications to the
Cygnus and NSP drivers for this change.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
H A Dclk-iproc.hf713c6bf Thu Oct 15 14:48:29 CDT 2015 Jon Mason <jonmason@broadcom.com> clk: iproc: Split off dig_filter

The PLL loop filter/gain can be located in a separate register on some
SoCs. Split these off into a separate variable, so that an offset can
be added if necessary. Also, make the necessary modifications to the
Cygnus and NSP drivers for this change.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
f713c6bf Thu Oct 15 14:48:29 CDT 2015 Jon Mason <jonmason@broadcom.com> clk: iproc: Split off dig_filter

The PLL loop filter/gain can be located in a separate register on some
SoCs. Split these off into a separate variable, so that an offset can
be added if necessary. Also, make the necessary modifications to the
Cygnus and NSP drivers for this change.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
H A Dclk-iproc-pll.cf713c6bf Thu Oct 15 14:48:29 CDT 2015 Jon Mason <jonmason@broadcom.com> clk: iproc: Split off dig_filter

The PLL loop filter/gain can be located in a separate register on some
SoCs. Split these off into a separate variable, so that an offset can
be added if necessary. Also, make the necessary modifications to the
Cygnus and NSP drivers for this change.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
f713c6bf Thu Oct 15 14:48:29 CDT 2015 Jon Mason <jonmason@broadcom.com> clk: iproc: Split off dig_filter

The PLL loop filter/gain can be located in a separate register on some
SoCs. Split these off into a separate variable, so that an offset can
be added if necessary. Also, make the necessary modifications to the
Cygnus and NSP drivers for this change.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>