Searched hist:d8d8ccf2 (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/net/ethernet/sfc/ |
| H A D | ef10_regs.h | d8d8ccf2 Mon Dec 18 10:57:18 CST 2017 Bert Kenward <bkenward@solarflare.com> sfc: update EF10 register definitions
The RX_L4_CLASS field has shrunk from 3 bits to 2 bits. The upper
bit was never used in previous hardware, so we can use the new
definition throughout.
The TSO OUTER_IPID field was previously spelt differently from the
external definitions.
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
d8d8ccf2 Mon Dec 18 10:57:18 CST 2017 Bert Kenward <bkenward@solarflare.com> sfc: update EF10 register definitions
The RX_L4_CLASS field has shrunk from 3 bits to 2 bits. The upper
bit was never used in previous hardware, so we can use the new
definition throughout.
The TSO OUTER_IPID field was previously spelt differently from the
external definitions.
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
|
| H A D | ef10.c | d8d8ccf2 Mon Dec 18 10:57:18 CST 2017 Bert Kenward <bkenward@solarflare.com> sfc: update EF10 register definitions
The RX_L4_CLASS field has shrunk from 3 bits to 2 bits. The upper
bit was never used in previous hardware, so we can use the new
definition throughout.
The TSO OUTER_IPID field was previously spelt differently from the
external definitions.
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
d8d8ccf2 Mon Dec 18 10:57:18 CST 2017 Bert Kenward <bkenward@solarflare.com> sfc: update EF10 register definitions
The RX_L4_CLASS field has shrunk from 3 bits to 2 bits. The upper
bit was never used in previous hardware, so we can use the new
definition throughout.
The TSO OUTER_IPID field was previously spelt differently from the
external definitions.
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
|