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| /openbmc/linux/drivers/clk/tegra/ |
| H A D | clk-tegra114.c | d17cb95f Wed Aug 07 06:25:07 CDT 2013 Mark Zhang <markz@nvidia.com> clk: tegra: Fix vde/2d/3d clock src offset
In Tegra114, vde/gr_2d/gr_3d have 3 bits for clock source selection.
So change the clock init macro for these clocks from
"TEGRA_INIT_DATA_INT" to "TEGRA_INIT_DATA_INT8".
Besides, no one uses "TEGRA_INIT_DATA_INT" after this change, so
remove this macro.
Signed-off-by: Mark Zhang <markz@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
d17cb95f Wed Aug 07 06:25:07 CDT 2013 Mark Zhang <markz@nvidia.com> clk: tegra: Fix vde/2d/3d clock src offset
In Tegra114, vde/gr_2d/gr_3d have 3 bits for clock source selection.
So change the clock init macro for these clocks from
"TEGRA_INIT_DATA_INT" to "TEGRA_INIT_DATA_INT8".
Besides, no one uses "TEGRA_INIT_DATA_INT" after this change, so
remove this macro.
Signed-off-by: Mark Zhang <markz@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
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