Searched hist:ccea5e8a (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/drivers/bus/ |
| H A D | arm-integrator-lm.c | ccea5e8a Thu Feb 13 06:41:23 CST 2020 Linus Walleij <linus.walleij@linaro.org> bus: Add driver for Integrator/AP logic modules
The logic modules on the Integrator/AP (Application Platform)
are logic tiles with (typically) one or a few peripheral
devices. They are most commonly used for FPGA prototyping.
Using the device tree node for logic tiles, we probe them
in order and check if the special system controller register
confirm their presence before populating the node for a tile.
This supercedes the code in arch/arm/mach-integrator/lm.[c|h]
and makes it possible to populate the tiles using the device
tree instead of boardfile-based descriptions.
Tested with all peripherals including graphics and MMC card
working fine with the IM-PD1 example tile from Arm.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
ccea5e8a Thu Feb 13 06:41:23 CST 2020 Linus Walleij <linus.walleij@linaro.org> bus: Add driver for Integrator/AP logic modules
The logic modules on the Integrator/AP (Application Platform)
are logic tiles with (typically) one or a few peripheral
devices. They are most commonly used for FPGA prototyping.
Using the device tree node for logic tiles, we probe them
in order and check if the special system controller register
confirm their presence before populating the node for a tile.
This supercedes the code in arch/arm/mach-integrator/lm.[c|h]
and makes it possible to populate the tiles using the device
tree instead of boardfile-based descriptions.
Tested with all peripherals including graphics and MMC card
working fine with the IM-PD1 example tile from Arm.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| H A D | Makefile | ccea5e8a Thu Feb 13 06:41:23 CST 2020 Linus Walleij <linus.walleij@linaro.org> bus: Add driver for Integrator/AP logic modules
The logic modules on the Integrator/AP (Application Platform)
are logic tiles with (typically) one or a few peripheral
devices. They are most commonly used for FPGA prototyping.
Using the device tree node for logic tiles, we probe them
in order and check if the special system controller register
confirm their presence before populating the node for a tile.
This supercedes the code in arch/arm/mach-integrator/lm.[c|h]
and makes it possible to populate the tiles using the device
tree instead of boardfile-based descriptions.
Tested with all peripherals including graphics and MMC card
working fine with the IM-PD1 example tile from Arm.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
ccea5e8a Thu Feb 13 06:41:23 CST 2020 Linus Walleij <linus.walleij@linaro.org> bus: Add driver for Integrator/AP logic modules
The logic modules on the Integrator/AP (Application Platform)
are logic tiles with (typically) one or a few peripheral
devices. They are most commonly used for FPGA prototyping.
Using the device tree node for logic tiles, we probe them
in order and check if the special system controller register
confirm their presence before populating the node for a tile.
This supercedes the code in arch/arm/mach-integrator/lm.[c|h]
and makes it possible to populate the tiles using the device
tree instead of boardfile-based descriptions.
Tested with all peripherals including graphics and MMC card
working fine with the IM-PD1 example tile from Arm.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| H A D | Kconfig | ccea5e8a Thu Feb 13 06:41:23 CST 2020 Linus Walleij <linus.walleij@linaro.org> bus: Add driver for Integrator/AP logic modules
The logic modules on the Integrator/AP (Application Platform)
are logic tiles with (typically) one or a few peripheral
devices. They are most commonly used for FPGA prototyping.
Using the device tree node for logic tiles, we probe them
in order and check if the special system controller register
confirm their presence before populating the node for a tile.
This supercedes the code in arch/arm/mach-integrator/lm.[c|h]
and makes it possible to populate the tiles using the device
tree instead of boardfile-based descriptions.
Tested with all peripherals including graphics and MMC card
working fine with the IM-PD1 example tile from Arm.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
ccea5e8a Thu Feb 13 06:41:23 CST 2020 Linus Walleij <linus.walleij@linaro.org> bus: Add driver for Integrator/AP logic modules
The logic modules on the Integrator/AP (Application Platform)
are logic tiles with (typically) one or a few peripheral
devices. They are most commonly used for FPGA prototyping.
Using the device tree node for logic tiles, we probe them
in order and check if the special system controller register
confirm their presence before populating the node for a tile.
This supercedes the code in arch/arm/mach-integrator/lm.[c|h]
and makes it possible to populate the tiles using the device
tree instead of boardfile-based descriptions.
Tested with all peripherals including graphics and MMC card
working fine with the IM-PD1 example tile from Arm.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| /openbmc/linux/ |
| H A D | MAINTAINERS | ccea5e8a Thu Feb 13 06:41:23 CST 2020 Linus Walleij <linus.walleij@linaro.org> bus: Add driver for Integrator/AP logic modules
The logic modules on the Integrator/AP (Application Platform)
are logic tiles with (typically) one or a few peripheral
devices. They are most commonly used for FPGA prototyping.
Using the device tree node for logic tiles, we probe them
in order and check if the special system controller register
confirm their presence before populating the node for a tile.
This supercedes the code in arch/arm/mach-integrator/lm.[c|h]
and makes it possible to populate the tiles using the device
tree instead of boardfile-based descriptions.
Tested with all peripherals including graphics and MMC card
working fine with the IM-PD1 example tile from Arm.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
ccea5e8a Thu Feb 13 06:41:23 CST 2020 Linus Walleij <linus.walleij@linaro.org> bus: Add driver for Integrator/AP logic modules
The logic modules on the Integrator/AP (Application Platform)
are logic tiles with (typically) one or a few peripheral
devices. They are most commonly used for FPGA prototyping.
Using the device tree node for logic tiles, we probe them
in order and check if the special system controller register
confirm their presence before populating the node for a tile.
This supercedes the code in arch/arm/mach-integrator/lm.[c|h]
and makes it possible to populate the tiles using the device
tree instead of boardfile-based descriptions.
Tested with all peripherals including graphics and MMC card
working fine with the IM-PD1 example tile from Arm.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|