Searched hist:c7eae7fc (Results 1 – 6 of 6) sorted by relevance
/openbmc/u-boot/board/freescale/ls1021aqds/ |
H A D | ddr.h | c7eae7fc Thu Sep 11 15:32:07 CDT 2014 York Sun <yorksun@freescale.com> board/ls1021aqds: Add DDR4 support LS1021AQDS has a variant with DDR4 slot. This patch adds a new defconfig for this variant to enable DDR4 support. RAW timing parameters are not added for DDR4. The board timing parameters are only tuned for single- rank 1600 and 1800MT/s with Micron DIMM 9ASF51272AZ-2G1A1 due to DIMM availability. Signed-off-by: York Sun <yorksun@freescale.com> CC: Alison Wang <alison.wang@freescale.com>
|
H A D | MAINTAINERS | c7eae7fc Thu Sep 11 15:32:07 CDT 2014 York Sun <yorksun@freescale.com> board/ls1021aqds: Add DDR4 support LS1021AQDS has a variant with DDR4 slot. This patch adds a new defconfig for this variant to enable DDR4 support. RAW timing parameters are not added for DDR4. The board timing parameters are only tuned for single- rank 1600 and 1800MT/s with Micron DIMM 9ASF51272AZ-2G1A1 due to DIMM availability. Signed-off-by: York Sun <yorksun@freescale.com> CC: Alison Wang <alison.wang@freescale.com>
|
H A D | ddr.c | c7eae7fc Thu Sep 11 15:32:07 CDT 2014 York Sun <yorksun@freescale.com> board/ls1021aqds: Add DDR4 support LS1021AQDS has a variant with DDR4 slot. This patch adds a new defconfig for this variant to enable DDR4 support. RAW timing parameters are not added for DDR4. The board timing parameters are only tuned for single- rank 1600 and 1800MT/s with Micron DIMM 9ASF51272AZ-2G1A1 due to DIMM availability. Signed-off-by: York Sun <yorksun@freescale.com> CC: Alison Wang <alison.wang@freescale.com>
|
/openbmc/u-boot/configs/ |
H A D | ls1021aqds_ddr4_nor_defconfig | c7eae7fc Thu Sep 11 15:32:07 CDT 2014 York Sun <yorksun@freescale.com> board/ls1021aqds: Add DDR4 support LS1021AQDS has a variant with DDR4 slot. This patch adds a new defconfig for this variant to enable DDR4 support. RAW timing parameters are not added for DDR4. The board timing parameters are only tuned for single- rank 1600 and 1800MT/s with Micron DIMM 9ASF51272AZ-2G1A1 due to DIMM availability. Signed-off-by: York Sun <yorksun@freescale.com> CC: Alison Wang <alison.wang@freescale.com>
|
/openbmc/u-boot/arch/arm/include/asm/arch-ls102xa/ |
H A D | config.h | c7eae7fc Thu Sep 11 15:32:07 CDT 2014 York Sun <yorksun@freescale.com> board/ls1021aqds: Add DDR4 support LS1021AQDS has a variant with DDR4 slot. This patch adds a new defconfig for this variant to enable DDR4 support. RAW timing parameters are not added for DDR4. The board timing parameters are only tuned for single- rank 1600 and 1800MT/s with Micron DIMM 9ASF51272AZ-2G1A1 due to DIMM availability. Signed-off-by: York Sun <yorksun@freescale.com> CC: Alison Wang <alison.wang@freescale.com>
|
/openbmc/u-boot/include/configs/ |
H A D | ls1021aqds.h | c7eae7fc Thu Sep 11 15:32:07 CDT 2014 York Sun <yorksun@freescale.com> board/ls1021aqds: Add DDR4 support LS1021AQDS has a variant with DDR4 slot. This patch adds a new defconfig for this variant to enable DDR4 support. RAW timing parameters are not added for DDR4. The board timing parameters are only tuned for single- rank 1600 and 1800MT/s with Micron DIMM 9ASF51272AZ-2G1A1 due to DIMM availability. Signed-off-by: York Sun <yorksun@freescale.com> CC: Alison Wang <alison.wang@freescale.com>
|