Searched hist:b90fcc5b (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/net/ethernet/hisilicon/hns3/hns3vf/ |
| H A D | hclgevf_main.h | b90fcc5b Fri Nov 09 08:07:49 CST 2018 Huazhong Tan <tanhuazhong@huawei.com> net: hns3: add reset handling for VF when doing Core/Global/IMP reset
When a Core/Global/IMP reset occurs, the hardware sets the reset status
register of all PF/VF and reports a reset interrupt to all PF/VF and
firmware.
When receiving the reset interrupt:
1. The firmware will wait for 100 ms before resetting the hardware and
clear the reset status register of all PF when hardware reset is done.
2. The PF/VF driver needs to down the netdev within 100 ms and then wait
for hardware reset to finish.
3. After firmware clearing the reset status register of all PF, the PF
driver reinitializes the hardware and clear the reset status register
of it's VF.
4. After PF driver clearing the reset status register of VF, the VF driver
reinitializes the hardware.
This patch mainly add handling for the step 4.
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
b90fcc5b Fri Nov 09 08:07:49 CST 2018 Huazhong Tan <tanhuazhong@huawei.com> net: hns3: add reset handling for VF when doing Core/Global/IMP reset
When a Core/Global/IMP reset occurs, the hardware sets the reset status
register of all PF/VF and reports a reset interrupt to all PF/VF and
firmware.
When receiving the reset interrupt:
1. The firmware will wait for 100 ms before resetting the hardware and
clear the reset status register of all PF when hardware reset is done.
2. The PF/VF driver needs to down the netdev within 100 ms and then wait
for hardware reset to finish.
3. After firmware clearing the reset status register of all PF, the PF
driver reinitializes the hardware and clear the reset status register
of it's VF.
4. After PF driver clearing the reset status register of VF, the VF driver
reinitializes the hardware.
This patch mainly add handling for the step 4.
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
|
| H A D | hclgevf_main.c | b90fcc5b Fri Nov 09 08:07:49 CST 2018 Huazhong Tan <tanhuazhong@huawei.com> net: hns3: add reset handling for VF when doing Core/Global/IMP reset
When a Core/Global/IMP reset occurs, the hardware sets the reset status
register of all PF/VF and reports a reset interrupt to all PF/VF and
firmware.
When receiving the reset interrupt:
1. The firmware will wait for 100 ms before resetting the hardware and
clear the reset status register of all PF when hardware reset is done.
2. The PF/VF driver needs to down the netdev within 100 ms and then wait
for hardware reset to finish.
3. After firmware clearing the reset status register of all PF, the PF
driver reinitializes the hardware and clear the reset status register
of it's VF.
4. After PF driver clearing the reset status register of VF, the VF driver
reinitializes the hardware.
This patch mainly add handling for the step 4.
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
b90fcc5b Fri Nov 09 08:07:49 CST 2018 Huazhong Tan <tanhuazhong@huawei.com> net: hns3: add reset handling for VF when doing Core/Global/IMP reset
When a Core/Global/IMP reset occurs, the hardware sets the reset status
register of all PF/VF and reports a reset interrupt to all PF/VF and
firmware.
When receiving the reset interrupt:
1. The firmware will wait for 100 ms before resetting the hardware and
clear the reset status register of all PF when hardware reset is done.
2. The PF/VF driver needs to down the netdev within 100 ms and then wait
for hardware reset to finish.
3. After firmware clearing the reset status register of all PF, the PF
driver reinitializes the hardware and clear the reset status register
of it's VF.
4. After PF driver clearing the reset status register of VF, the VF driver
reinitializes the hardware.
This patch mainly add handling for the step 4.
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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