Searched hist:b45c48a7c30734272371fede01e96f499a314664 (Results 1 – 4 of 4) sorted by relevance
/openbmc/u-boot/arch/arm/cpu/armv7/ |
H A D | cp15.c | b45c48a7c30734272371fede01e96f499a314664 Mon Mar 09 17:12:00 CDT 2015 Nishanth Menon <nm@ti.com> ARM: Introduce erratum workaround for 454179
454179: Stale prediction may inhibit target address misprediction on next predicted taken branch Impacts: Every Cortex-A8 processors with revision lower than r2p1 Work around: Set IBE and disable branch size mispredict to 1
Also provide a hook for SoC specific handling to take place if needed.
Based on ARM errata Document revision 20.0 (13 Nov 2010)
Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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H A D | start.S | b45c48a7c30734272371fede01e96f499a314664 Mon Mar 09 17:12:00 CDT 2015 Nishanth Menon <nm@ti.com> ARM: Introduce erratum workaround for 454179
454179: Stale prediction may inhibit target address misprediction on next predicted taken branch Impacts: Every Cortex-A8 processors with revision lower than r2p1 Work around: Set IBE and disable branch size mispredict to 1
Also provide a hook for SoC specific handling to take place if needed.
Based on ARM errata Document revision 20.0 (13 Nov 2010)
Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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/openbmc/u-boot/arch/arm/include/asm/ |
H A D | armv7.h | b45c48a7c30734272371fede01e96f499a314664 Mon Mar 09 17:12:00 CDT 2015 Nishanth Menon <nm@ti.com> ARM: Introduce erratum workaround for 454179
454179: Stale prediction may inhibit target address misprediction on next predicted taken branch Impacts: Every Cortex-A8 processors with revision lower than r2p1 Work around: Set IBE and disable branch size mispredict to 1
Also provide a hook for SoC specific handling to take place if needed.
Based on ARM errata Document revision 20.0 (13 Nov 2010)
Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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/openbmc/u-boot/ |
H A D | README | b45c48a7c30734272371fede01e96f499a314664 Mon Mar 09 17:12:00 CDT 2015 Nishanth Menon <nm@ti.com> ARM: Introduce erratum workaround for 454179
454179: Stale prediction may inhibit target address misprediction on next predicted taken branch Impacts: Every Cortex-A8 processors with revision lower than r2p1 Work around: Set IBE and disable branch size mispredict to 1
Also provide a hook for SoC specific handling to take place if needed.
Based on ARM errata Document revision 20.0 (13 Nov 2010)
Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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