Searched hist:ae030570 (Results 1 – 8 of 8) sorted by relevance
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn302/ |
H A D | dcn302_resource.c | ae030570 Thu Feb 25 15:18:35 CST 2021 Atufa Khan <Atufa.Khan@amd.com> drm/amd/display: Separate caps for maximum RGB and YUV plane counts
Not all ASICs have same plane capabilities so need to split them out for proper support handling.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Atufa Khan <Atufa.Khan@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Solomon Chiu <solomon.chiu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/ |
H A D | dcn301_resource.c | ae030570 Thu Feb 25 15:18:35 CST 2021 Atufa Khan <Atufa.Khan@amd.com> drm/amd/display: Separate caps for maximum RGB and YUV plane counts
Not all ASICs have same plane capabilities so need to split them out for proper support handling.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Atufa Khan <Atufa.Khan@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Solomon Chiu <solomon.chiu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
H A D | dcn30_resource.c | ae030570 Thu Feb 25 15:18:35 CST 2021 Atufa Khan <Atufa.Khan@amd.com> drm/amd/display: Separate caps for maximum RGB and YUV plane counts
Not all ASICs have same plane capabilities so need to split them out for proper support handling.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Atufa Khan <Atufa.Khan@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Solomon Chiu <solomon.chiu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
H A D | dcn21_resource.c | ae030570 Thu Feb 25 15:18:35 CST 2021 Atufa Khan <Atufa.Khan@amd.com> drm/amd/display: Separate caps for maximum RGB and YUV plane counts
Not all ASICs have same plane capabilities so need to split them out for proper support handling.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Atufa Khan <Atufa.Khan@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Solomon Chiu <solomon.chiu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce110/ |
H A D | dce110_resource.c | ae030570 Thu Feb 25 15:18:35 CST 2021 Atufa Khan <Atufa.Khan@amd.com> drm/amd/display: Separate caps for maximum RGB and YUV plane counts
Not all ASICs have same plane capabilities so need to split them out for proper support handling.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Atufa Khan <Atufa.Khan@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Solomon Chiu <solomon.chiu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
H A D | dcn10_resource.c | ae030570 Thu Feb 25 15:18:35 CST 2021 Atufa Khan <Atufa.Khan@amd.com> drm/amd/display: Separate caps for maximum RGB and YUV plane counts
Not all ASICs have same plane capabilities so need to split them out for proper support handling.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Atufa Khan <Atufa.Khan@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Solomon Chiu <solomon.chiu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_resource.c | ae030570 Thu Feb 25 15:18:35 CST 2021 Atufa Khan <Atufa.Khan@amd.com> drm/amd/display: Separate caps for maximum RGB and YUV plane counts
Not all ASICs have same plane capabilities so need to split them out for proper support handling.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Atufa Khan <Atufa.Khan@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Solomon Chiu <solomon.chiu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/ |
H A D | dc.h | ae030570 Thu Feb 25 15:18:35 CST 2021 Atufa Khan <Atufa.Khan@amd.com> drm/amd/display: Separate caps for maximum RGB and YUV plane counts
Not all ASICs have same plane capabilities so need to split them out for proper support handling.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Atufa Khan <Atufa.Khan@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Solomon Chiu <solomon.chiu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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