Searched hist:a7cbf0b2 (Results 1 – 1 of 1) sorted by relevance
| /openbmc/linux/arch/arm64/boot/dts/marvell/ |
| H A D | armada-cp110.dtsi | a7cbf0b2 Tue Feb 13 10:32:10 CST 2018 Gregory CLEMENT <gregory.clement@bootlin.com> ARM64: dts: marvell: armada-cp110: Add registers clock for SPI nodes
This extra clock is needed to access the registers of the SPI controller
used on Armada 7K/8K SoCs.
This follows the changes already made in the binding documentation (as
well as in the driver) in:
'commit 92ae112e477ac412decc3fdd5c1eeb6c90c266b4 ("spi: orion: Fix clock
resource by adding an optional bus clock")'.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
a7cbf0b2 Tue Feb 13 10:32:10 CST 2018 Gregory CLEMENT <gregory.clement@bootlin.com> ARM64: dts: marvell: armada-cp110: Add registers clock for SPI nodes
This extra clock is needed to access the registers of the SPI controller
used on Armada 7K/8K SoCs.
This follows the changes already made in the binding documentation (as
well as in the driver) in:
'commit 92ae112e477ac412decc3fdd5c1eeb6c90c266b4 ("spi: orion: Fix clock
resource by adding an optional bus clock")'.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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