Searched hist:a68a6146 (Results 1 – 2 of 2) sorted by relevance
/openbmc/qemu/target/ppc/ |
H A D | internal.h | a68a6146 Wed Feb 08 23:33:30 CST 2017 Balamuruhan S <bala24@linux.vnet.ibm.com> target-ppc: implement load atomic instruction lwat: Load Word Atomic ldat: Load Doubleword Atomic The instruction includes as function code (5 bits) which gives a detail on the operation to be performed. The patch implements five such functions. Signed-off-by: Balamuruhan S <bala24@linux.vnet.ibm.com> Signed-off-by: Harish S <harisrir@linux.vnet.ibm.com> Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> [ combine both lwat/ldat implementation using macro ] Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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H A D | translate.c | a68a6146 Wed Feb 08 23:33:30 CST 2017 Balamuruhan S <bala24@linux.vnet.ibm.com> target-ppc: implement load atomic instruction lwat: Load Word Atomic ldat: Load Doubleword Atomic The instruction includes as function code (5 bits) which gives a detail on the operation to be performed. The patch implements five such functions. Signed-off-by: Balamuruhan S <bala24@linux.vnet.ibm.com> Signed-off-by: Harish S <harisrir@linux.vnet.ibm.com> Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> [ combine both lwat/ldat implementation using macro ] Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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