Searched hist:a5c9c3ba (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/clk/qcom/ |
| H A D | lpasscc-sc8280xp.c | a5c9c3ba Thu Jun 08 07:53:12 CDT 2023 Srinivas Kandagatla <srinivas.kandagatla@linaro.org> clk: qcom: Add lpass clock controller driver for SC8280XP
Add support for the lpass clock controller found on SC8280XP based devices.
This would allow lpass peripheral loader drivers to control the clocks and
bring the subsystems out of reset.
Currently this patch only supports resets as the Q6DSP is in control of
LPASS IP which manages most of the clocks via Q6PRM service on GPR rpmsg
channel.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608125315.11454-4-srinivas.kandagatla@linaro.org
|
| H A D | Makefile | a5c9c3ba Thu Jun 08 07:53:12 CDT 2023 Srinivas Kandagatla <srinivas.kandagatla@linaro.org> clk: qcom: Add lpass clock controller driver for SC8280XP
Add support for the lpass clock controller found on SC8280XP based devices.
This would allow lpass peripheral loader drivers to control the clocks and
bring the subsystems out of reset.
Currently this patch only supports resets as the Q6DSP is in control of
LPASS IP which manages most of the clocks via Q6PRM service on GPR rpmsg
channel.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608125315.11454-4-srinivas.kandagatla@linaro.org
|
| H A D | Kconfig | a5c9c3ba Thu Jun 08 07:53:12 CDT 2023 Srinivas Kandagatla <srinivas.kandagatla@linaro.org> clk: qcom: Add lpass clock controller driver for SC8280XP
Add support for the lpass clock controller found on SC8280XP based devices.
This would allow lpass peripheral loader drivers to control the clocks and
bring the subsystems out of reset.
Currently this patch only supports resets as the Q6DSP is in control of
LPASS IP which manages most of the clocks via Q6PRM service on GPR rpmsg
channel.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608125315.11454-4-srinivas.kandagatla@linaro.org
|