Searched hist:a12562bb (Results 1 – 5 of 5) sorted by relevance
| /openbmc/linux/drivers/cxl/ |
| H A D | cxlpci.h | a12562bb Wed May 18 18:35:00 CDT 2022 Dan Williams <dan.j.williams@intel.com> cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init()
In preparation for changing how the driver handles 'mem_enable' in the CXL
DVSEC control register. Merge the contents of cxl_hdm_decode_init() into
cxl_dvsec_ranges() and rename the combined function cxl_hdm_decode_init().
The possible cleanups and fixes that result from this merge are saved for a
follow-on change.
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Link: https://lore.kernel.org/r/165291690027.1426646.10249756632415633752.stgit@dwillia2-xfh
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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| H A D | mem.c | a12562bb Wed May 18 18:35:00 CDT 2022 Dan Williams <dan.j.williams@intel.com> cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init()
In preparation for changing how the driver handles 'mem_enable' in the CXL
DVSEC control register. Merge the contents of cxl_hdm_decode_init() into
cxl_dvsec_ranges() and rename the combined function cxl_hdm_decode_init().
The possible cleanups and fixes that result from this merge are saved for a
follow-on change.
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Link: https://lore.kernel.org/r/165291690027.1426646.10249756632415633752.stgit@dwillia2-xfh
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
|
| /openbmc/linux/tools/testing/cxl/test/ |
| H A D | mock.c | a12562bb Wed May 18 18:35:00 CDT 2022 Dan Williams <dan.j.williams@intel.com> cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init()
In preparation for changing how the driver handles 'mem_enable' in the CXL
DVSEC control register. Merge the contents of cxl_hdm_decode_init() into
cxl_dvsec_ranges() and rename the combined function cxl_hdm_decode_init().
The possible cleanups and fixes that result from this merge are saved for a
follow-on change.
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Link: https://lore.kernel.org/r/165291690027.1426646.10249756632415633752.stgit@dwillia2-xfh
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
|
| /openbmc/linux/tools/testing/cxl/ |
| H A D | Kbuild | a12562bb Wed May 18 18:35:00 CDT 2022 Dan Williams <dan.j.williams@intel.com> cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init()
In preparation for changing how the driver handles 'mem_enable' in the CXL
DVSEC control register. Merge the contents of cxl_hdm_decode_init() into
cxl_dvsec_ranges() and rename the combined function cxl_hdm_decode_init().
The possible cleanups and fixes that result from this merge are saved for a
follow-on change.
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Link: https://lore.kernel.org/r/165291690027.1426646.10249756632415633752.stgit@dwillia2-xfh
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
|
| /openbmc/linux/drivers/cxl/core/ |
| H A D | pci.c | a12562bb Wed May 18 18:35:00 CDT 2022 Dan Williams <dan.j.williams@intel.com> cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init()
In preparation for changing how the driver handles 'mem_enable' in the CXL
DVSEC control register. Merge the contents of cxl_hdm_decode_init() into
cxl_dvsec_ranges() and rename the combined function cxl_hdm_decode_init().
The possible cleanups and fixes that result from this merge are saved for a
follow-on change.
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Link: https://lore.kernel.org/r/165291690027.1426646.10249756632415633752.stgit@dwillia2-xfh
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
|