Searched hist:"9 e263131" (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/clk/qcom/ |
| H A D | clk-pll.h | 9e263131 Wed Jan 15 12:47:24 CST 2014 Stephen Boyd <sboyd@codeaurora.org> clk: qcom: Add support for phase locked loops (PLLs)
Add support for Qualcomm's PLLs (phase locked loops). This is
sufficient enough to be able to determine the rate the PLL is
running at. We can add rate setting support later when it's
needed.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
9e263131 Wed Jan 15 12:47:24 CST 2014 Stephen Boyd <sboyd@codeaurora.org> clk: qcom: Add support for phase locked loops (PLLs)
Add support for Qualcomm's PLLs (phase locked loops). This is
sufficient enough to be able to determine the rate the PLL is
running at. We can add rate setting support later when it's
needed.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
|
| H A D | clk-pll.c | 9e263131 Wed Jan 15 12:47:24 CST 2014 Stephen Boyd <sboyd@codeaurora.org> clk: qcom: Add support for phase locked loops (PLLs)
Add support for Qualcomm's PLLs (phase locked loops). This is
sufficient enough to be able to determine the rate the PLL is
running at. We can add rate setting support later when it's
needed.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
9e263131 Wed Jan 15 12:47:24 CST 2014 Stephen Boyd <sboyd@codeaurora.org> clk: qcom: Add support for phase locked loops (PLLs)
Add support for Qualcomm's PLLs (phase locked loops). This is
sufficient enough to be able to determine the rate the PLL is
running at. We can add rate setting support later when it's
needed.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
|
| H A D | Makefile | 9e263131 Wed Jan 15 12:47:24 CST 2014 Stephen Boyd <sboyd@codeaurora.org> clk: qcom: Add support for phase locked loops (PLLs)
Add support for Qualcomm's PLLs (phase locked loops). This is
sufficient enough to be able to determine the rate the PLL is
running at. We can add rate setting support later when it's
needed.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
9e263131 Wed Jan 15 12:47:24 CST 2014 Stephen Boyd <sboyd@codeaurora.org> clk: qcom: Add support for phase locked loops (PLLs)
Add support for Qualcomm's PLLs (phase locked loops). This is
sufficient enough to be able to determine the rate the PLL is
running at. We can add rate setting support later when it's
needed.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
|