Searched hist:"9 ddcd920" (Results 1 – 2 of 2) sorted by relevance
/openbmc/linux/drivers/phy/qualcomm/ |
H A D | phy-qcom-qmp-pcs-pcie-v5_20.h | 9ddcd920 Wed Nov 02 03:18:34 CDT 2022 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> phy: qcom-qmp-pcie: Fix high latency with 4x2 PHY when ASPM is enabled
The PCIe QMP 4x2 RC PHY generates high latency when ASPM is enabled. This seem to be fixed by clearing the QPHY_V5_20_PCS_PCIE_PRESET_P10_POST register of the pcs_misc register space.
Fixes: 2c91bf6bf290 ("phy: qcom-qmp: Add SM8450 PCIe1 PHY support") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20221102081835.41892-1-manivannan.sadhasivam@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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H A D | phy-qcom-qmp-pcie.c | 9ddcd920 Wed Nov 02 03:18:34 CDT 2022 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> phy: qcom-qmp-pcie: Fix high latency with 4x2 PHY when ASPM is enabled
The PCIe QMP 4x2 RC PHY generates high latency when ASPM is enabled. This seem to be fixed by clearing the QPHY_V5_20_PCS_PCIE_PRESET_P10_POST register of the pcs_misc register space.
Fixes: 2c91bf6bf290 ("phy: qcom-qmp: Add SM8450 PCIe1 PHY support") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20221102081835.41892-1-manivannan.sadhasivam@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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