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/openbmc/u-boot/arch/arc/lib/ |
H A D | cache.c | 95336738 Wed Mar 21 07:59:01 CDT 2018 Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> ARC: Cache: Fix SLC operations when SLC is bypassed for data If L1 D$ is disabled SLC is bypassed for data and all load/store requests are sent directly to main memory. If L1 I$ is disabled SLC is NOT bypassed for instructions and all instruction requests are fetched through SLC. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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