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/openbmc/linux/arch/arm/mach-footbridge/ |
H A D | common.c | 90890f17 Mon Nov 29 07:43:14 CST 2021 Arnd Bergmann <arnd@arndb.de> ARM: footbridge: use GENERIC_IRQ_MULTI_HANDLER
Footbridge still uses the classic IRQ entry path in assembler, but this is easily converted into an equivalent C version.
In this case, the correlation between IRQ numbers and bits in the status register is non-obvious, and the priorities are handled by manually checking each bit in a static order, re-reading the status register after each handled event.
I moved the code into the new file and edited the syntax without changing this sequence to keep the behavior as close as possible to what it traditionally did.
Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Marc Zyngier <maz@kernel.org> Tested-by: Vladimir Murzin <vladimir.murzin@arm.com> # ARMv7M Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
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/openbmc/linux/arch/arm/ |
H A D | Kconfig | 90890f17 Mon Nov 29 07:43:14 CST 2021 Arnd Bergmann <arnd@arndb.de> ARM: footbridge: use GENERIC_IRQ_MULTI_HANDLER
Footbridge still uses the classic IRQ entry path in assembler, but this is easily converted into an equivalent C version.
In this case, the correlation between IRQ numbers and bits in the status register is non-obvious, and the priorities are handled by manually checking each bit in a static order, re-reading the status register after each handled event.
I moved the code into the new file and edited the syntax without changing this sequence to keep the behavior as close as possible to what it traditionally did.
Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Marc Zyngier <maz@kernel.org> Tested-by: Vladimir Murzin <vladimir.murzin@arm.com> # ARMv7M Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
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