Searched hist:"7 cb0d6c1" (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/omapdrm/ |
| H A D | omap_dmm_tiler.h | 7cb0d6c1 Thu Sep 25 14:24:29 CDT 2014 Tomi Valkeinen <tomi.valkeinen@ti.com> drm/omap: fix TILER on OMAP5
On OMAP5 it is not possible to use TILER buffer with CPU when caching or
write-combining is used. Doing so leads to errors from the memory
manager.
However, on OMAP4, write-combining works fine.
This patch adds platform specific data for the TILER, and a function
tiler_get_cpu_cache_flags() which can be used to get the caching mode to
be used.
Note that without write-combining the use of the TILER buffer with CPU
is unusably slow. It's still good to have it operational for testing
purposes.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
7cb0d6c1 Thu Sep 25 14:24:29 CDT 2014 Tomi Valkeinen <tomi.valkeinen@ti.com> drm/omap: fix TILER on OMAP5
On OMAP5 it is not possible to use TILER buffer with CPU when caching or
write-combining is used. Doing so leads to errors from the memory
manager.
However, on OMAP4, write-combining works fine.
This patch adds platform specific data for the TILER, and a function
tiler_get_cpu_cache_flags() which can be used to get the caching mode to
be used.
Note that without write-combining the use of the TILER buffer with CPU
is unusably slow. It's still good to have it operational for testing
purposes.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
|
| H A D | omap_dmm_priv.h | 7cb0d6c1 Thu Sep 25 14:24:29 CDT 2014 Tomi Valkeinen <tomi.valkeinen@ti.com> drm/omap: fix TILER on OMAP5
On OMAP5 it is not possible to use TILER buffer with CPU when caching or
write-combining is used. Doing so leads to errors from the memory
manager.
However, on OMAP4, write-combining works fine.
This patch adds platform specific data for the TILER, and a function
tiler_get_cpu_cache_flags() which can be used to get the caching mode to
be used.
Note that without write-combining the use of the TILER buffer with CPU
is unusably slow. It's still good to have it operational for testing
purposes.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
7cb0d6c1 Thu Sep 25 14:24:29 CDT 2014 Tomi Valkeinen <tomi.valkeinen@ti.com> drm/omap: fix TILER on OMAP5
On OMAP5 it is not possible to use TILER buffer with CPU when caching or
write-combining is used. Doing so leads to errors from the memory
manager.
However, on OMAP4, write-combining works fine.
This patch adds platform specific data for the TILER, and a function
tiler_get_cpu_cache_flags() which can be used to get the caching mode to
be used.
Note that without write-combining the use of the TILER buffer with CPU
is unusably slow. It's still good to have it operational for testing
purposes.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
|
| H A D | omap_dmm_tiler.c | 7cb0d6c1 Thu Sep 25 14:24:29 CDT 2014 Tomi Valkeinen <tomi.valkeinen@ti.com> drm/omap: fix TILER on OMAP5
On OMAP5 it is not possible to use TILER buffer with CPU when caching or
write-combining is used. Doing so leads to errors from the memory
manager.
However, on OMAP4, write-combining works fine.
This patch adds platform specific data for the TILER, and a function
tiler_get_cpu_cache_flags() which can be used to get the caching mode to
be used.
Note that without write-combining the use of the TILER buffer with CPU
is unusably slow. It's still good to have it operational for testing
purposes.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
7cb0d6c1 Thu Sep 25 14:24:29 CDT 2014 Tomi Valkeinen <tomi.valkeinen@ti.com> drm/omap: fix TILER on OMAP5
On OMAP5 it is not possible to use TILER buffer with CPU when caching or
write-combining is used. Doing so leads to errors from the memory
manager.
However, on OMAP4, write-combining works fine.
This patch adds platform specific data for the TILER, and a function
tiler_get_cpu_cache_flags() which can be used to get the caching mode to
be used.
Note that without write-combining the use of the TILER buffer with CPU
is unusably slow. It's still good to have it operational for testing
purposes.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
|
| H A D | omap_gem.c | 7cb0d6c1 Thu Sep 25 14:24:29 CDT 2014 Tomi Valkeinen <tomi.valkeinen@ti.com> drm/omap: fix TILER on OMAP5
On OMAP5 it is not possible to use TILER buffer with CPU when caching or
write-combining is used. Doing so leads to errors from the memory
manager.
However, on OMAP4, write-combining works fine.
This patch adds platform specific data for the TILER, and a function
tiler_get_cpu_cache_flags() which can be used to get the caching mode to
be used.
Note that without write-combining the use of the TILER buffer with CPU
is unusably slow. It's still good to have it operational for testing
purposes.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
7cb0d6c1 Thu Sep 25 14:24:29 CDT 2014 Tomi Valkeinen <tomi.valkeinen@ti.com> drm/omap: fix TILER on OMAP5
On OMAP5 it is not possible to use TILER buffer with CPU when caching or
write-combining is used. Doing so leads to errors from the memory
manager.
However, on OMAP4, write-combining works fine.
This patch adds platform specific data for the TILER, and a function
tiler_get_cpu_cache_flags() which can be used to get the caching mode to
be used.
Note that without write-combining the use of the TILER buffer with CPU
is unusably slow. It's still good to have it operational for testing
purposes.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
|