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H A Dneponset.c71045520 Sun Jan 15 18:17:41 CST 2012 Russell King <rmk+kernel@arm.linux.org.uk> ARM: sa11x0: neponset: fix interrupt setup

Since ARM was converted to genirq, the neponset IRQ implementation has
gradually broken as a result of various subtle changes being introduced
into genirq.

It used to be that simple IRQs did not need an IRQ chip. This is no
longer the case, and genirq barfs in irq_set_handler(). Fix this by
introducing a dummy no-op chip, and registering it along with the flow
handler.

Neponset IRQs really don't have any masking ability - all we have is a
status register to allow us to decode the source, and a three input OR
gate inside a CPLD.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
71045520 Sun Jan 15 18:17:41 CST 2012 Russell King <rmk+kernel@arm.linux.org.uk> ARM: sa11x0: neponset: fix interrupt setup

Since ARM was converted to genirq, the neponset IRQ implementation has
gradually broken as a result of various subtle changes being introduced
into genirq.

It used to be that simple IRQs did not need an IRQ chip. This is no
longer the case, and genirq barfs in irq_set_handler(). Fix this by
introducing a dummy no-op chip, and registering it along with the flow
handler.

Neponset IRQs really don't have any masking ability - all we have is a
status register to allow us to decode the source, and a three input OR
gate inside a CPLD.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>