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/openbmc/u-boot/drivers/ddr/fsl/
H A Dmain.c6b9e309a8a7f0f33252288f0ed8794a83a488301 Mon Feb 10 15:59:43 CST 2014 York Sun <yorksun@freescale.com> Driver/ddr: Add support of different DDR base address

DDR base address has been the same from the view of core and DDR
controllers. This has changed for Freescale ARM-based SoCs. Controllers
setup DDR memory in a contiguous space and cores view it at separated
locations.

Signed-off-by: York Sun <yorksun@freescale.com>
/openbmc/u-boot/
H A DREADME6b9e309a8a7f0f33252288f0ed8794a83a488301 Mon Feb 10 15:59:43 CST 2014 York Sun <yorksun@freescale.com> Driver/ddr: Add support of different DDR base address

DDR base address has been the same from the view of core and DDR
controllers. This has changed for Freescale ARM-based SoCs. Controllers
setup DDR memory in a contiguous space and cores view it at separated
locations.

Signed-off-by: York Sun <yorksun@freescale.com>