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| H A D | imx8qxp.dtsi | 68956811 Tue Apr 14 08:24:28 CDT 2020 Peng Fan <peng.fan@nxp.com> arm64: dts: imx8qxp: support scu mailbox channel
With mailbox driver support i.MX8 SCU MU channel, we could
use it to avoid trigger interrupts for each TR/RR registers
in one MU, instead, only one RX interrupt for a recv and
one TX interrupt for a send.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
68956811 Tue Apr 14 08:24:28 CDT 2020 Peng Fan <peng.fan@nxp.com> arm64: dts: imx8qxp: support scu mailbox channel
With mailbox driver support i.MX8 SCU MU channel, we could
use it to avoid trigger interrupts for each TR/RR registers
in one MU, instead, only one RX interrupt for a recv and
one TX interrupt for a send.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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