Searched hist:"56 d83d1c" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/u-boot/board/freescale/vf610twr/ |
| H A D | vf610twr.c | 56d83d1c Wed Apr 23 11:17:51 CDT 2014 Stefan Agner <stefan@agner.ch> arm: vf610: add DDR_SEL_PAD_CONTR register
Set DDR_SEL_PAD_CONTR register explicitly to DDR3 which solves RAM
issues with newer silicon (1.1). This register was added in revision
4 of the Vybrid Reference Manual.
Signed-off-by: Stefan Agner <stefan@agner.ch>
|
| /openbmc/u-boot/arch/arm/include/asm/arch-vf610/ |
| H A D | imx-regs.h | 56d83d1c Wed Apr 23 11:17:51 CDT 2014 Stefan Agner <stefan@agner.ch> arm: vf610: add DDR_SEL_PAD_CONTR register
Set DDR_SEL_PAD_CONTR register explicitly to DDR3 which solves RAM
issues with newer silicon (1.1). This register was added in revision
4 of the Vybrid Reference Manual.
Signed-off-by: Stefan Agner <stefan@agner.ch>
|